參數(shù)資料
型號： MSC1210Y3PAGTG4
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQFP64
封裝： GREEN, PLASTIC, TQFP-64
文件頁數(shù)： 5/94頁
文件大小： 913K
代理商： MSC1210Y3PAGTG4
MSC1210
SBAS203J MARCH 2002 REVISED JANUARY 2008
www.ti.com
13
PIN DESCRIPTIONS
PIN #
NAME
DESCRIPTION
1
XOUT
The crystal oscillator pin XOUT supports parallel resonant AT cut fundamental frequency crystals and ceramic
resonators. XOUT serves as the output of the crystal amplifier.
2
XIN
The crystal oscillator pin XIN supports parallel resonant AT cut fundamental frequency crystals and ceramic
resonators. XIN can also be an input if there is an external clock source instead of a crystal.
310
P3.0–P3.7
Port 3 is a bidirectional I/O port. The alternate functions for Port 3 are listed below.
310
P3.0–P3.7
PORT 3.x
Alternate Name(s)
Alternate Use
P3.0
RxD0
Serial port 0 input
P3.1
TxD0
Serial port 0 output
P3.2
INT0
External interrupt 0
P3.3
INT1/TONE/PWM
External interrupt 1/TONE/PWM output
P3.4
T0
Timer 0 external input
P3.5
T1
Timer 1 external input
P3.6
WR
External data memory write strobe
P3.7
RD
External data memory read strobe
11, 14, 15, 42, 58
DVDD
Digital power supply
12, 41, 57
DGND
Digital ground
13
RST
A HIGH on the reset input for two tOSC periods resets the device.
16, 32, 33
NC
No connection. This pin must be left unconnected.
17, 27
AGND
Analog ground
18
AIN0
Analog input channel 0
19
AIN1
Analog input channel 1
20
AIN2
Analog input channel 2
21
AIN3
Analog input channel 3
22
AIN4
Analog input channel 4
23
AIN5
Analog input channel 5
24
AIN6, EXTD
Analog input channel 6, digital low-voltage detect input, generates DLVD interrupt
25
AIN7, EXTA
Analog input channel 7, analog low-voltage detect input, generates ALVD interrupt
26
AINCOM
Analog common for single-ended inputs or analog input for differential inputs
28
AVDD
Analog power supply. AVDD must rise above 2.0V to disable Analog Brownout Reset function.
29
REF IN–
Voltage reference negative input (must be tied to AGND for internal VREF)
30
REF IN+
Voltage reference positive input
31
REF OUT
Internal voltage reference output (tie to REF IN+ for internal VREF use)
3440, 43
P2.0P2.7
Port 2 is a bidirectional I/O port. The alternate functions for Port 2 are listed below. Refer to P2DDR, SFR B1hB2h.
3440, 43
P2.0P2.7
PORT 2.x
Alternate Name
Alternate Use
P2.0
A8
Address bit 8
P2.1
A9
Address bit 9
P2.2
A10
Address bit 10
P2.3
A11
Address bit 11
P2.4
A12
Address bit 12
P2.5
A13
Address bit 13
P2.6
A14
Address bit 14
P2.7
A15
Address bit 15
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