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參數(shù)資料
| 型號： | MR80C52XXX-25SHXXX:R |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CQCC44 |
| 封裝： | LCC-44 |
| 文件頁數(shù)： | 102/176頁 |
| 文件大?。?/td> | 4226K |
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31
8126F–AVR–05/12
ATtiny13A
Control and Status Register – ACSR. This will reduce power consumption in Idle mode. If the
ADC is enabled, a conversion starts automatically when this mode is entered.
7.1.2
ADC Noise Reduction Mode
When the SM[1:0] bits are written to 01, the SLEEP instruction makes the MCU enter ADC
Noise Reduction mode, stopping the CPU but allowing the ADC, the external interrupts, and the
Watchdog to continue operating (if enabled). This sleep mode halts clk
I/O, clkCPU, and clkFLASH,
while allowing the other clocks to run.
This improves the noise environment for the ADC, enabling higher resolution measurements. If
the ADC is enabled, a conversion starts automatically when this mode is entered. Apart form the
ADC Conversion Complete interrupt, only an External Reset, a Watchdog Reset, a Brown-out
Reset, an SPM/EEPROM ready interrupt, an external level interrupt on INT0 or a pin change
interrupt can wake up the MCU from ADC Noise Reduction mode.
7.1.3
Power-down Mode
When the SM[1:0] bits are written to 10, the SLEEP instruction makes the MCU enter Power-
down mode. In this mode, the Oscillator is stopped, while the external interrupts, and the Watch-
dog continue operating (if enabled). Only an External Reset, a Watchdog Reset, a Brown-out
Reset, an external level interrupt on INT0, or a pin change interrupt can wake up the MCU. This
sleep mode halts all generated clocks, allowing operation of asynchronous modules only.
7.2
Software BOD Disable
When the Brown-out Detector (BOD) is enabled by BODLEVEL fuses (see Table 17-3 on page
104), the BOD is actively monitoring the supply voltage during a sleep period. It is possible to
save power by disabling the BOD by software in Power-Down sleep mode. The sleep mode
power consumption will then be at the same level as when BOD is globally disabled by fuses.
If BOD is disabled by software, the BOD function is turned off immediately after entering the
sleep mode. Upon wake-up from sleep, BOD is automatically enabled again. This ensures safe
operation in case the V
CC level has dropped during the sleep period.
When the BOD has been disabled, the wake-up time from sleep mode will be approximately
60s to ensure that the BOD is working correctly before the MCU continues executing code.
BOD disable is controlled by the BODS (BOD Sleep) bit of BOD Control Register, see “BODCR
– Brown-Out Detector Control Register” on page 33. Writing this bit to one turns off BOD in
Power-Down and Stand-By, while writing a zero keeps the BOD active. The default setting is
zero, i.e. BOD active.
Writing to the BODS bit is controlled by a timed sequence and an enable bit, see “BODCR –
7.3
Power Reduction Register
The Power Reduction Register (see “PRR – Power Reduction Register” on page 34) provides a
method to reduce power consumption by stopping the clock to individual peripherals. The cur-
rent state of the peripheral is frozen and the I/O registers can not be read or written. When
stopping the clock resources used by the peripheral will remain occupied, hence the peripheral
should in most cases be disabled before stopping the clock. Waking up a module (by clearing
the bit in PRR) puts the module in the same state as before shutdown.
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