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參數(shù)資料
| 型號： | MR80C52CXXX-12/883:D |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQCC44 |
| 文件頁數(shù)： | 77/125頁 |
| 文件大小： | 6456K |
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259
7707F–AVR–11/10
AT90USB82/162
Memory Page instruction. To ensure correct loading of the page, the data low byte must
be loaded before data high byte is applied for a given address. The Program Memory
Page is stored by loading the Write Program Memory Page instruction with the address
lines 15..8. Before issuing this command, make sure the instruction Load Extended
Address Byte has been used to define the MSB of the address. The extended address
byte is stored until the command is re-issued, i.e., the command needs only to be
issued for the first page, since the memory size is not larger than 64KWord. If polling
(RDY/BSY) is not used, the user must wait at least t
WD_FLASH before issuing the next
page. (See Table 25-15.) Accessing the serial programming interface before the Flash
write operation completes can result in incorrect programming.
5.
The EEPROM array is programmed one byte at a time by supplying the address and
data together with the appropriate Write instruction. An EEPROM memory location is
first automatically erased before new data is written. If polling is not used, the user must
wait at least t
WD_EEPROM before issuing the next byte. (See Table 25-15.) In a chip
erased device, no 0xFFs in the data file(s) need to be programmed.
6.
Any memory location can be verified by using the Read instruction which returns the
content at the selected address at serial output PDO. When reading the Flash memory,
use the instruction Load Extended Address Byte to define the upper address byte,
which is not included in the Read Program Memory instruction. The extended address
byte is stored until the command is re-issued, i.e., the command needs only to be
issued for the first page, since the memory size is not larger than 64KWord.
7.
At the end of the programming session, RESET can be set high to commence normal
operation.
8.
Power-off sequence (if needed):
Set RESET to “1”.
Turn V
CC power off.
Figure 25-11. Serial Programming Waveforms
Table 25-15. Minimum Wait Delay Before Writing the Next Flash or EEPROM Location
Symbol
Minimum Wait Delay
tWD_FLASH
4.5 ms
t
WD_EEPROM
9.0 ms
t
WD_ERASE
9.0 ms
MSB
LSB
SERIAL CLOCK INPUT
(SCK)
SERIAL DATA INPUT
(MOSI)
(MISO)
SAMPLE
SERIAL DATA OUTPUT
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| MR80C52CXXX-12SCR | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQCC44 |
| MQ80C52XXX-25 | 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CQFP44 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MR80C86 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS 16-Bit Microprocessor |
| MR80C86/B | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述:Microprocessor, 16 Bit, 44 Pin, Ceramic, LCC |
| MR80C86-2 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS 16-Bit Microprocessor |
| MR80C86-2/883 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MR80C86-2/B | 制造商:Intersil Corporation 功能描述:MPU 80C86 16BIT CMOS 8MHZ 44PLCC - Rail/Tube |
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