參數(shù)資料
型號: MR2A16A
廠商: Electronic Theatre Controls, Inc.
英文描述: 256K x 16-Bit 3.3-V Asynchronous Magnetoresistive RAM
中文描述: 256K x 16位的3.3V異步磁阻隨機(jī)存取內(nèi)存
文件頁數(shù): 8/16頁
文件大?。?/td> 161K
代理商: MR2A16A
MR2A16A/D, Rev. 0.1
8
Freescale Semiconductor
Timing Specifications
Write Mode
Table 10. Write Cycle Timing 1 (W Controlled; See Notes 1, 2, 3, and 4)
Parameter
Symbol
Timing Set
25
Min
25
0
Unit
Notes
20
35
Min
20
0
Max
Max
Min
35
0
Max
Write cycle time
Address set-up time
Address valid to end of write
(G high)
Address valid to end of write
(G low)
t
AVAV
t
AVWL
ns
ns
8
t
AVWH
12
15
18
ns
t
AVWH
15
17
20
ns
Write pulse width (G high)
t
WLWH
t
WLEH
t
WLWH
t
WLEH
t
DVWH
t
WHDX
t
WLQZ
t
WHQX
t
WHAX
8
10
15
ns
Write pulse width (G low)
8
10
15
ns
Data valid to end of write
Data hold time
Write low to data Hi-Z
Write high to output active
Write recovery time
5
0
0
3
8
7
6
0
0
3
10
9
10
0
0
3
12
12
ns
ns
ns
ns
ns
5, 6, 7
5, 6, 7
NOTES:
1. A write occurs during the overlap of E low and W low.
2. Due to product sensitivities to noise, power supplies must be properly grounded and decoupled and bus contention
conditions must be minimized or eliminated during read and write cycles.
3. If G goes low at the same time or after W goes low, the output will remain in a high-impedance state.
4. After W, E, or UB/LB has been brought high, the signal must remain in steady-state high for a minimum of 2 ns.
5. This parameter is sampled and not 100% tested.
6. Transition is measured
±
200 mV from steady-state voltage.
7. At any given voltage or temperature, t
WLQZ
max < t
WHQX
min.
8. All write cycle timings are referenced from the last valid address to the first transition address.
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MR2A16ACTS35C 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:256K x 16-Bit 3.3-V Asynchronous Magnetoresistive RAM
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