參數(shù)資料
型號(hào)： MPM21CUB500A
廠商： INTEL CORP
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 500 MHz, MICROPROCESSOR, XMA
封裝： MMC-2
文件頁數(shù)： 43/64頁
文件大小： 826K
代理商： MPM21CUB500A
Celeron
Processor Mobile Module MMC-2
at 700 MHz, 650 MHz, 600 MHz, 550 MHz, 500 MHz, and 450 MHz
42
Datasheet
243357-005
Equation 14.
(The nearest standard 1% value is 66.5 k
. The example will continue with R2= 66.5 k.)
Rearranging Equation 8 to solve for C9 yields Equation 15.
Equation 15.
Now a value for C9 can be calculated as shown in the Equation 16 below.
Equation 16.
C 9= 0.354
F
(A close standard value of 0.33
F will yield a t_delay of 466.0 S.)
The ramp-up time, t_ramp, is defined as shown in Equation 17.
Equation 17.
If M1 has a VGS(sat) of -2.4V, then Equation 18 applies.
Equation 18.
t_ramp = 948.8
S
The maximum current during the power-up ramp is shown in Equation 19 below.
Equation 19.
If the total capacitance, Ctotal on the V_DC bus, is 119.4
F, then see Equation 20 below.
Equation 20.
Imax = 0.944A
From the values assumed and calculated, t_delay = 466.0
S, t_ramp = 949.0 S, and Imax = 944
mA.
R2
Vg R16
.
V_DC Vg
,
R2
66.67 k
=
C9
t_delay
R2 ln 1
Vt
V_DC
Vg
.
t_ramp
R2 C9
.
ln 1
Vsat
Vgs
.
t_delay
≈
Imax
Ctotal
t
v
d
Ctotal
V_DC
t_ramp
.
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