參數(shù)資料
型號: MPC980
廠商: Motorola, Inc.
英文描述: Dual 3.3V PLL Clock Generator(雙3.3V PLL時鐘發(fā)生器)
中文描述: 雙3.3V的PLL時鐘發(fā)生器(雙3.3鎖相環(huán)時鐘發(fā)生器)
文件頁數(shù): 2/7頁
文件大?。?/td> 133K
代理商: MPC980
MPC980
MOTOROLA
ECLinPS and ECLinPS Lite
DL140 — Rev 3
2
Figure 1. Logic Diagram
Processor
Clock PLL
Test Mode
Xtal
Osc
14.31818MHz
fsel0:1
Dly_PCI
÷
2
÷
2/
÷
4
÷
4
2
QP0:3
4
QP4:5_QPCI4:5
2
QPCI0:3
4
Q14.3M
Q14_16M
16MHz
12MHz
24MHz
40MHz
16M_Sel
Q12M
Q24M
Q40M
System
Clock PLL
TCLK
OE
0
1
0
1
TCLK_Sel
fsel2
Table 1. Pin Descriptions
Pin
Label
Description
1
VCCA
Analog VCC for System PLL Use
Filter
(Note 1.)
Sel Ext’l TCLK or Internal Xtal Ref
External LVCMOS Ref Signal
Xtal Pin 1
Xtal Pin 2
System Ground Input
Sets QP & QPI Relationship
(See Function Table 2 on page 3.)
VCC Pin for Internal Circuits
Least Bit for QP/QPI Output Funct
(See Function Table 1 on page 3.)
Most Bit for QP/QPI Output Function
(See Function Table 1 on page 3.)
Selection of QP/QPI Output Funct
(See Function Table 4 on page 3.)
Analog VCC Proc’ssr PLL Use Filter
(Note 1.)
System Ground Input
Selects 16MHz / 14MHz for
Q14_16M Output
Output for 16MHz / 14MHz Xtal Osc
System Ground Input
VCC in for the CMOS Outputs
CMOS Output for 14.3MHz Xtal Osc
System Ground Input
CMOS Output QP0
VCC in for the CMOS Outputs
CMOS Output QP1
System Ground Input
CMOS Output QP2
VCC in for the CMOS Outputs
2
3
4
5
6
7
TCLK_Sel
TCLK
Xtal1
Xtal2
GND
DLY_PCI
50K
None
None
None
50K
8
9
VCCI
fsel0
50K
10
fsel1
50K
11
fsel2
50K
12
VCCA
13
14
GNDA
16M_SEL
50K
15
16
17
18
19
20
21
22
23
24
25
Q14_16M
GND0
VCC0
Q14M
GND0
QP0
VCC0
QP1
GND0
QP2
VCC0
Pin
Label
Description
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
GNDI
VCCO
QP3
GND0
GND0
QP4_PCI4
VCC0
QP5_PCI5
GND0
GND0
QPCI3
VCCO
QPCI2
GND0
VCCI
GND0
QPCI1
VCC0
QPCI0
GND0
QM12
VCC0
Q40M
GND0
Q24M
OE
System Ground Input
VCC in for the CMOS Outputs
CMOS Output QP3
System Ground Input
System Ground Input
CMOS Output QP4_PCI4
VCC in for the CMOS Outputs
CMOS Output QP5_PCI5
System Ground Input
System Ground Input
CMOS Output QPCI3
VCC in for the CMOS Outputs
CMOS Output QPCI2
System Ground Input
VCC for Internal Core Logic
System Ground Input
CMOS Output QPCI1
VCC in for the CMOS Outputs
CMOS Output QPCI0
System Ground Input
CMOS Output QM12
VCC in for the CMOS Outputs
CMOS Output Q40M
System Ground Input
CMOS Output Q24M
Select Output State
(See Function Table 1 on page 3.)
System Ground Input
50K
52
GND0
1. The filter recommended for the analog power pins is found in
Figure 3 in the Applications Information section on page 5.
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