參數(shù)資料
型號: MPC8349EZUAJF
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 533 MHz, RISC PROCESSOR, PBGA672
封裝: 35 X 35 MM, 1.50 MM HEIGHT, 1 MM PITCH, TBGA-672
文件頁數(shù): 46/115頁
文件大小: 1228K
代理商: MPC8349EZUAJF
MPC8349E PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 5
36
Freescale Semiconductor
USB
Figure 14 and Figure 15 provide the AC test load and signals for the USB, respectively.
Figure 14. USB AC Test Load
Figure 15. USB Signals
usb clock to output valid - all
outputs
tUSKHOV
—7
ns
Output hold from usb clock - all
outputs
tUSKHOX
2—
ns
Notes:
1. The symbols used for timing specifications herein follow the pattern of t(First two letters of
functional block)(signal)(state) (reference)(state) for inputs and t(First two letters of functional
block)(reference)(state)(signal)(state) for outputs. For example, tUSIXKH symbolizes usb timing
(US) for the input (I) to go invalid (X) with respect to the time the usb clock reference (K)
goes high (H). Also, tUSKHOX symbolizes usb timing (US) for the usb clock reference (K)
to go high (H), with respect to the output (O) going invalid (X) or output hold time.
2. All timings are in reference to usb clock.
3. All signals are measured from OVDD/2 of the rising edge of usb clock to 0.4 × OVDD of the
signal in question for 3.3-V signaling levels.
4. Input timings are measured at the pin.
5. For purposes of active/float timing measurements, the Hi-Z or off state is defined to be
when the total current delivered through the component pin is less than or equal to the
leakage current specification.
Table 29. USB General Timing Parameters (continued)
Parameter
Symbol 1
Min
Max
Unit
Notes
Output
Z0 = 50
OVDD/2
RL = 50
Output Signals:
tUSKHOV
USB0_CLK/USB1_CLK/DR_CLK
Input Signals
tUSIXKH
tUSIVKH
tUSKHOX
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