參數(shù)資料
型號(hào)： MPC823UM_REV1_16-CPM7
廠商： Motorola, Inc.
英文描述： 10 AMP SUBMINIATURE POWER RELAY
中文描述： 通信處理器模塊
文件頁(yè)數(shù)： 58/74頁(yè)
文件大?。?/td> 234K
代理商： MPC823UM_REV1_16-CPM7
Communication Processor Module
16-436
MPC823 REFERENCE MANUAL
MOTOROLA
S
C
1
P
RFCR and TFCR—The receive and transmit function code register entries contain the
value that you want to appear on the AT pins when the associated SDMA channel
accesses memory. This register controls the byte-ordering convention used in the
transfers.
Bits 0–2—Reserved
These bits are reserved and must be set to 0.
BO—Byte Ordering
You must set these bits to select the required byte ordering of the data buffer.
00 =
The DEC/Intel convention is used for byte ordering (swapped operation) and
is also called little-endian byte ordering. The transmission order of bytes within
a buffer word is reversed in comparison to the Motorola mode. This mode is
supported only for 32-bit port size memory.
PowerPC little-endian byte ordering. As data is transmitted onto the serial line
from the data buffer, the least-significant byte of the buffer double-word
contains data to be transmitted earlier than the most-significant byte of the
same buffer double-word.
Motorola byte ordering (normal operation) is also called big-endian byte
ordering. As data is transmitted onto the serial line from the data buffer, the
most-significant byte of the buffer word contains data to be transmitted earlier
than the least-significant byte of the same buffer word.
AT—Address Type 1–3
These bits contain the function code value used during the SDMA channel memory
access. AT0 is driven with a 1 to identify this SDMA channel access as a DMA-type
access.
01 =
1X =
RFCR
BIT
0
1
2
3
4
5
6
7
FIELD
RESERVED
BO
AT
RESET
0
0
0
R/W
R/W
R/W
R/W
ADDR
SPI BASE + 0x04
TFCR
BIT
0
1
2
3
4
5
6
7
FIELD
RESERVED
BO
AT
RESET
0
0
0
R/W
R/W
R/W
R/W
ADDR
SPI BASE + 0x05
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