參數(shù)資料
型號(hào): MPC823
廠商: Motorola, Inc.
英文描述: Communication Processor Module
中文描述: 通信處理器模塊
文件頁數(shù): 56/74頁
文件大小: 234K
代理商: MPC823
Communication Processor Module
16-434
MPC823 REFERENCE MANUAL
MOTOROLA
S
C
1
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Transmission continues until no more data is available or the SPISEL pin is negated. If the
pin is negated before all the data is transmitted, it stops, but the TX buffer descriptor stays
open. Further transmission continues once the SPISEL pin is reasserted and SPICLK
begins toggling. After the characters in the TX buffer descriptor are transmitted, the serial
peripheral interface transmits ones if SPISEL is not negated.
16.12.3.1 MULTIMASTER OPERATION.
The serial peripheral interface can operate in a
multimaster environment in which more than one SPI device is connected to the same bus.
In this configuration, the SPIMOSI, SPIMISO, and SPICLK pins of all SPIs are connected
together and the SPISEL input pins are connected separately. In this environment, only one
SPI device can be in master mode and all the others must be in slave mode. When the serial
peripheral interface is configured as a master and its SPISEL signal goes active or low, a
multimaster error will occur because more than one SPI device is a bus master. The serial
peripheral interface sets the MME bit in the SPIE register and a maskable interrupt is issued
to the core. It also disables SPI operation and the output drivers of the SPI pins. The core
must clear the EN bit the SPMODE register before using the serial peripheral interface
again. After the problems are corrected, clear the MME bit and enable the serial peripheral
interface the same way you would after a reset.
Note:
The maximum sustained data rate that the serial peripheral interface supports is
SYSTEMCLK/50. However, the serial peripheral interface can transfer a single
character at much higher rates. For instance, SYSTEMCLK/4 in master mode
and SYSTEMCLK/2 in slave mode. If multiple characters are to be transmitted,
you must insert gaps between them so that it will not exceed the maximum
sustained data rate.
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