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參數資料
| 型號： | MPC823 |
| 廠商： | Motorola, Inc. |
| 英文描述： | Communication Processor Module |
| 中文描述： | 通信處理器模塊 |
| 文件頁數： | 38/74頁 |
| 文件大?。?/td> | 234K |
| 代理商： | MPC823 |
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Communication Processor Module
16-416
MPC823 REFERENCE MANUAL
MOTOROLA
S
C
1
P
W—Wrap (Final Buffer Descriptor in Table)
0 = This is not the last buffer descriptor in the RX buffer descriptor table.
1 = This is the last buffer descriptor in the RX buffer descriptor table. After this buffer
is used, the communication processor module receives incoming data into the first
buffer descriptor that RBASE points to in the table. The number of RX buffer
descriptors in this table is programmable and determined only by the W bit and
overall space constraints of the dual-port RAM.
I—Interrupt
0 = No interrupt is generated after this buffer is filled.
1 = The RX bit in the SMCE–Transparent register is set when this buffer is completely
filled by the communication processor module, thus indicating that the core needs
to process the buffer. The RX bit can cause an interrupt if it is enabled.
CM—Continuous Mode
0 = Normal operation.
1 = The E bit is not cleared by the communication processor module after this buffer
descriptor is closed, thus allowing the associated data buffer to be automatically
overwritten next time the communication processor module accesses this buffer
descriptor. However, the E bit is cleared if an error occurs during reception,
regardless of how the CM bit is set.
OV—Overrun
This bit indicates that a receiver overrun has occurred during message reception. The
communication processor module writes this bit after the received data is placed into the
associated data buffer.
DATA LENGTH
This field represents the number of octets that the communication processor module writes
into this data buffer. It is only written once by the communication processor module as the
buffer is closed. The communication processor module writes this field after the received
data is placed into the associated data buffer.
RX DATA BUFFER POINTER
This field always points to the first location of the associated data buffer, must be even, and
can reside in internal or external memory. The communication processor module writes
these bits after the received data is placed into the associated data buffer.
Note:
The actual amount of memory allocated for this buffer must be greater than or
equal to the MRBLR entry.
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