- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄369923 > MPC505 (MOTOROLA INC) Highly Integrated, Low-Power, 32-Bit Microcontroller PDF資料下載
參數(shù)資料
| 型號： | MPC505 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Highly Integrated, Low-Power, 32-Bit Microcontroller |
| 中文描述： | 32-BIT, RISC MICROCONTROLLER, PQFP16 |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 68K |
| 代理商： | MPC505 |
Application Note
AN1281
4
MOTOROLA
Enabling and
Configuring
Individual
Interrupts
Individual interrupt levels are enabled and disabled by the 32-bit
IRQENABLE register. Setting a bit enables a source of the
corresponding level to cause an actual interrupt; clearing a bit disables
the corresponding level. For instance, to enable interrupt level 3 and
disable all other levels, set bit 3 of IRQENABLE to one and clear all other
bits to zero.
External interrupt pins can be configured for either edge or level
sensitivity. An interrupt pin that is not needed for interrupt function can
be configured for general-purpose input or output.
Interrupt
Identification
When an interrupt occurs, software reads the IRQAND register to find
out which enabled interrupt caused the exception. The IRQAND register
is simply the logical AND of the IRQPEND register (which indicates
pending levels) with the IRQENABLE register (which indicates enabled
levels).
IRQAND = IRQPEND IRQENABLE
Priorities
If two interrupts occur at the same time, a priority scheme is needed to
determine which one to handle first. MPC505 interrupt priorities are not
determined by hardware, but rather by the way software responds to an
interrupt. An easy and efficient way to handle priorities is to assign levels
in order of priority, using level 0 for the highest priority and level 31 for
the lowest priority. The instruction “count leading zeros in a word”
(cntlzw) can be used to quickly identify the first bit set, i.e., the highest
priority interrupt.
More general priority schemes can be implemented by means of a set of
bitmasks to be ANDed with the IRQAND register. The first mask used
has a one in the bit position corresponding to each level in the highest
priority set, and so on. Such schemes allow multiple interrupts at the
same priority, and also allow the implementation of dynamic priorities by
changing the masks.
IRQENABLE
0
1
2
3
4
…
31
0
0
0
1
0
…
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MPC509 | Highly Integrated, Low-Power, 32-Bit Microcontroller |
| MPC5200BV400 | MPC5200 Hardware Specifications |
| MPC5200CBV266 | MPC5200 Hardware Specifications |
| MPC5200CBV400 | MPC5200 Hardware Specifications |
| MPC5200ID | MPC5200 Hardware Specifications |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC506 | 制造商:BB 制造商全稱:BB 功能描述:Single-Ended 16-Channel/Differential 8-Channel CMOS ANALOG MULTIPLEXERS |
| MPC506A | 制造商:BB 制造商全稱:BB 功能描述:Single-Ended 16-Channel/Differential 8-Channel CMOS ANALOG MULTIPLEXERS |
| MPC506AP | 功能描述:多路器開關(guān) IC 16Ch Sgl-Ended Input Ana Multipl RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 開關(guān)數(shù)量:4 開啟電阻（最大值）:7 Ohms 開啟時間（最大值）: 關(guān)閉時間（最大值）: 傳播延遲時間:0.25 ns 工作電源電壓:2.3 V to 3.6 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UQFN-16 |
| MPC506AP | 制造商:BURR-BROWN 功能描述:IC MUX 16CH SP DIP28 506 制造商:Texas Instruments 功能描述:Multiplexer IC |
| MPC506AP | 制造商:Texas Instruments 功能描述:IC MUX 16CH SP DIP28 506 制造商:Texas Instruments 功能描述:IC, MUX 16CH SP, DIP28, 506 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。