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參數資料
| 型號： | MPC107 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 32-Bit Microprocessor(32位微處理器) |
| 中文描述： | 32位微處理器（32位微處理器） |
| 文件頁數： | 37/46頁 |
| 文件大?。?/td> | 585K |
| 代理商： | MPC107 |
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MPC107 Hardware Specifications (Rev 0.2)
PRELIMINARYSUBJECT TO CHANGE WITHOUT NOTICE
37
Package Description
Notes:
1
This pin has an internal pull-up resistor which is enabled only when the MPC107 is in the reset state. The
value of the internal pull-up resistor is not guaranteed, but is sufTcient to ensure that a logic '1' is read into
conTguration bits during reset.
This pin is a reset conTguration pin.
MDL[0] is a reset conTguration pin and has an internal pull-up resistor which is enabled only when the
MPC107 is in the reset state.The value of the internal pull-up resistor is not guaranteed, but is sufTcient to
insure that a logic'1' is read into conTguration bits during reset.
Multi-pin signals such as AD[0D31] or DL[0D31] have their physical package pin numbers listed in order corre-
sponding to the signal names. Ex: AD0 is on pin D21, AD1 is on pin D23,... AD31 is on pin N23.
SDMA[10D1] are reset conTguration pins and have internal pull-up resistors which are enabled only when the
MPC107 is in the reset state.The values of the internal pull-up resistors is not guaranteed, but are sufTcient to
ensure that logic '1's are read into the conTguration bits during reset.
Recommend a weak pull-up resistor (2K D 10K Ohm) be placed on this PCI control pin to LVdd.
V
and V
IL
for these signals are the same as the PCI V
IH
and V
IL
entries in Table 3. òDC Electrical SpeciTca-
tionsó.
Recommend a weak pull-up resistor (2K D 10K Ohm) be placed on this pin to OVdd.
Recommend a weak pull-up resistor (2K D 10K Ohm) be placed on this pin to GVdd.
10 This pin has an internal pull-up resistor; the value of the internal pull-up resistor is not guaranteed, but is sufT-
cient to prevent unused inputs from oating.
11 This pin is affected by programmable PCI_HOLD_DEL parameter, see Section 1.4.3.3.1 òPCI Signal Output
Hold Timingó.
12 This pin is an open drain signal.
13 This pin is a Sustained Tri-State pin as deTned by the
PCI Local Bus SpeciTcation.
2
3
4
5
6
7
8
9
BVdd
P7, R3, R5, U5, U7, V3, W7, W9,
W12, W14, W17, AA3, AA5, AA9,
AA11, AA15, AA17, AC6, AC9,
AC12, AC15, AC18, AC21, AD2
Input
Vdd
K19, W16, T19, G10, G16, K7, T7,
W10, W19, W20, Y21, AA22,
AB23, AC24, AD25
Input
Manufacturing Pins
FTP[2D3]
R20, D24
I/O
OVDD
DRV_PCI
4,8
MTP[1D2]
B12, B13
I/O
GVDD
DRV_MEM_ADDR
4,9
Table 17. MPC107 Pinout Listing (Continued)
Signal Name
Package Pin Number
Pin
Type
Supply
Voltage
Output Driver Type
Notes
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