參數(shù)資料
型號(hào)： ML610Q412P-XXXWA
廠商： LAPIS SEMICONDUCTOR CO LTD
元件分類： 微控制器/微處理器
英文描述： RISC MICROCONTROLLER, UUC95
封裝： 2.83 MM X 2.63 MM, 0.35 MM HEIGHT, 0.80 MM PITCH, DIE-95
文件頁數(shù)： 140/152頁
文件大小： 1641K
代理商： ML610Q412P-XXXWA
ML610Q411/ML610Q412/ML610Q415 User’s Manual
Chapter 6
Clock Generation Circuit
6 – 3
6.2.2
Frequency Control Register 0 (FCON0)
Address: 0F002H
Access: R/W
Access size: 8/16 bits
Initial value: 33H
7
6
5
4
3
2
1
0
FCON0
OUTC1
OUTC0
OSCM0
SYSC1
SYSC0
R/W
Initial value
0
1
0
1
FCON0 is a special function register (SFR) to control the high-speed clock generation circuit and to select system
clock.
[Description of Bits]
SYSC1, SYSC0 (bits 1, 0)
The SYSC1 and SYSC0 bits are used to select the frequency of the high-speed clock (HSCLK) used for system
clock and periphera1 circuits (including high-speed time base counter). OSCLK, 1/2OSCLK, 1/4OSCLK, or
1/8OSCLK can be selected.
The maximum operating frequency guaranteed for the system clock (SYSCLK) of this
LSI is 500kHz. At system reset, 1/8OSCLK is selected.
SYSC1
SYSC0
Description
0
OSCLK
0
1
1/2OSCLK
1
0
1/4OSCLK
1
1/8OSCLK (initial value)
OSCM0 (bits 2)
The OSCM0 bit is used to select the mode of the high-speed clock generation circuit.
RC oscillation mode or
external clock input mode can be selected.
The setting of OSCM0 can be changed only when high-speed oscillation is being stopped (ENOSC bit of FCON1 is
“0”). At system reset, RC oscillation mode is selected.
The mode is fixed to RC oscillation mode and this bit always returns “0” when reading on ML610Q415.
OSCM0
Description
0
RC oscillation mode (initial value)
1
External clock input mode
OUTC1, OUTC0 (bits 5, 4)
The OUTC1 and OUTC0 bits are used to select the frequency of the high-speed output clock which is output when
the secondary function of the port is used.
OSCLK, 1/2OSCLK, 1/4OSCLK, or 1/8OSCLK can be selected.
At system reset, 1/8OSCLK is selected.
OUTC1
OUTC0
Description
0
OSCLK
0
1
1/2OSCLK
1
0
1/4OSCLK
1
1/8OSCLK (initial value)
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