參數(shù)資料
型號(hào): ML54051
廠商: LAPIS SEMICONDUCTOR CO LTD
元件分類: 存儲(chǔ)控制器/管理單元
英文描述: FLASH MEMORY DRIVE CONTROLLER, PQFP120
封裝: 14 X 14 MM, 0.40 MM PITCH, PLASTIC, TQFP-120
文件頁(yè)數(shù): 8/37頁(yè)
文件大?。?/td> 304K
代理商: ML54051
Semiconductor
ML54051
12/33
5.2 Write Sector Commands
Two methods are reserved for a faster access.
5.2.1
Dual Port Control
By controlling Port A and Port B independently, 2 chips can be accessed simultaneously when
erasing data or writing the same data, which doubles the access time.
Chip 1
Port A
Chip 3
Chip 5
Chip 2
Port B
Chip 4
Chip 6
5.2.2
Block Control
When the host requests a write that includes Block 1 of Port B, if it is unnecessary to save the stored
data, a block read will not be performed for the shaded section of the diagram below, which saves
read time.
This is enabled by making use of NAND flash memory characteristics to erase data in a unit of
a block.
Port A
Block 1
Port B
Block 1
Port A
Block 2
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