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參數(shù)資料
| 型號： | ML54051 |
| 廠商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分類： | 存儲控制器/管理單元 |
| 英文描述： | FLASH MEMORY DRIVE CONTROLLER, PQFP120 |
| 封裝： | 14 X 14 MM, 0.40 MM PITCH, PLASTIC, TQFP-120 |
| 文件頁數(shù)： | 17/37頁 |
| 文件大?。?/td> | 304K |
| 代理商： | ML54051 |
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Semiconductor
ML54051
20/33
6.6 ATA Registers
ATA registers realize functions of the PC Card ATA Specifications.
6.6.1
Data Register (Write/Read)
This 16-bit or 8-bit register is used in the transfer of data blocks between the internal data buffer
and the host. Data can be transferred via consecutive 16-bit or 8-bit accesses to the data register.
6.6.2
Error Register (Read Only)
Additional information regarding the cause of a processing error in the previously executed
command is indicated. If the error bit of the status register has been set, the host must examine
this register.
D7
BBK
D6
UNC
D5
0
D4
IDNF
D3
0
D2
ABRT
D1
0
D0
AMNF
BBK
: This bit is set when a Bad Block is detected.
UNC : This bit is set when an Uncorrectable Error is encountered.
IDNF : The requested sector ID is in error or cannot be found.
ABRT : This bit is set if the command has been aborted or when an invalid command has been
issued.
AMNF : This bit is set in case of a general error.
6.6.3
Feature Register (Write Only)
This register is used to write information related to commands.
D7
D6
D5
D4
Feature Bytes
D3
D2
D1
D0
6.6.4
Sector Count Register (Write/Read)
This register is used to specify the number of sectors or address of logical blocks to be processed
by a command. By reading this register after a command has been completed, the host can check
the number of sectors not processed by the command.
D7
D6
D5
D4
Sector Count
D3
D2
D1
D0
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