參數(shù)資料
型號(hào)： MK50H28Q25/XX
廠商： STMICROELECTRONICS
元件分類(lèi)： 微控制器/微處理器
英文描述： 1 CHANNEL(S), LOCAL AREA NETWORK CONTROLLER, PQCC52
封裝： PLASTIC, LCC-52
文件頁(yè)數(shù)： 40/64頁(yè)
文件大?。?/td> 429K
代理商： MK50H28Q25/XX
FIELD
DESCRIPTION
PART NUMBER
Indicates the part number (28 Hex) for the MK50H28.
REV INDICATOR
Indicates the current revision of the part.
PHASE
Indicates the current phase of operation.
0: Stopped, TD is held at 1’s, RD is ignored
10: Information Transfer Only
11: Information Transfer + Auto LMI Transmission - User Mode
12: Information Transfer + Auto LMI Transmission - Network Mode
13: Information Transfer + Auto LMI Transmission - Bi-directional Mode
20: Transparent Mode (all channels are treated as data channels)
30: Initialization Complete
XCTADR:<23:00>
Current Transmit Context Table Address. This pointer indicates the address of the
entry in Context Table Memory Structure corresponding to the descriptor ring from
which frames are currently being transmitted.
RCTADR:<23:00>
Current Receive Context Table Address. This pointer indicates the address of the
entry in Context Table Memory Structure corresponding to the descriptor ring into
which received frames are currently being placed.
Xmit Seq Number
Transmit Sequence Number. The Current Sequence number used by the most
recently transmitted LMI frame.
Recv Seq Number
Receive Sequence Number. The Current Sequence number used by the most
recently received LMI frame
By-Directional Xmit Seq
By-Directional Transmit Sequence Number. The Current Sequence number used by
the most recently transmitted LMI frame using the Optional Bi-directional Procedures
By-Directional Recv Seq
By-Directional Receive Sequence Number. The Current Sequence number used by
the most recently received LMI frame using the Optional Bi-directional Procedures
PRMISA:<23:00>
Previous MISS Address. This pointer indicates the address in the Context Table for
the most current receive MISS. This value is updated by the MK50H28 whenever a
MISS condition occurs and does not require issuing a Status Request primitive to
update it, as do all the other fields in the Status Buffer.
4.4 Detailed Programming Procedures
4.4.1 Initialization (Reading of InitializationBlock)
The following procedure should be followed to initialize the MK50H28:
1. Setup bus control information in CSR4.
2. Setup the Initialization Block, Address Lookup Table, Context Table, and Descriptor Rings.
3. Load the address of the initialization block information into CSR’s 2 and 3.
4. Issue the INIT primitive through CSR1 (write 4200H to CSR1) instructing the MK50H28 to read
the initialization block pointed to by CSR’s 2 and 3.
5. Wait for the INIT confirmation primitive (CSR1 = 0242H) from the MK50H28. Then clear the PAV
bit in CSR1 (write 0040H to CSR1).
6. Issue the Start primitive through CSR1 (write 4300H to CSR1).
The MK50H28 will now be in
INFORMATION TRANSFER phaseand the MK50H28 will begin to continuously transmit flags.
7. Enable interrupts in CSR0 if desired.
4.4.2 Link Setup
4.4.2.1 User Mode (Auto LMI Mode)
The following procedure should be followed for establishing a link.
1. Make sure that the ACTIVE bit in the Address Lookup Table is set for the LMI channel.
2. Issue the Auto LMI Primitive 7 with UPARM = 0 through CSR1 (write 4700H) to place the device
in Auto LMI User Mode.
MK50H28
45/64
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