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參數(shù)資料
| 型號(hào)： | MIC502 |
| 廠商： | Micrel Semiconductor,Inc. |
| 元件分類： | FPGA |
| 英文描述： | FPGA - 100000 SYSTEM GATE 2.5 VOLT - NOT RECOMMENDED for NEW DESIGN |
| 中文描述： | 范進(jìn)展信息管理IC |
| 文件頁(yè)數(shù)： | 2/11頁(yè) |
| 文件大?。?/td> | 130K |
| 代理商： | MIC502 |
MIC502
Pin Configuration
Micrel
MIC502
164
May 1999
Pin Description
Pin Number
Pin Name
Pin Function
1
VT1
Thermistor 1 (Input): Analog input of approximately 30% to 70% of V
DD
produces active duty cycle of 0% to 100% at driver output (OUT). Connect to
external thermistor network (or other temperature sensor). Pull low for
shutdown.
2
CF
PWM Timing Capacitor (External Component): Positive terminal for the
PWM triangle-wave generator timing capacitor. The recommended C
F
is
0.1
μ
F for 30Hz PWM operation.
3
VSLP
Sleep Threshold (Input): The voltage on this pin is compared to V
T1
and V
T2
.
When V
T1
< V
SLP
and V
T2
< V
SLP
the MIC502 enters sleep mode until V
T1
or
V
T2
rises above V
WAKE
. (V
WAKE
= V
SLP
+ V
HYST
.) Grounding VSLP
disables the sleep-mode function.
4
GND
Ground
5
VT2
Thermistor 2 (Input): Analog input of approximately 30% to 70% of V
DD
produces active duty cycle of 0% to 100% at driver output (OUT). Connect to
motherboard fan control signal or second temperature sensor.
6
/OTF
Overtemperature Fault (Output): Open-collector output (active low).
Indicates overtemperature fault condition (V
T1
> V
OT
) when active.
Driver Output: Asymmetical-drive active-high complimentary PWM output.
Typically connect to base of external NPN motor control transistor.
7
OUT
8
VDD
Power Supply (Input): IC supply input; may be independent of fan power
supply.
1
2
3
4
8
7
6
5
VDD
OUT
OTF
VT2
VT1
CF
VSLP
GND
8-Pin SOIC (M)
8-Pin DIP (N)
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