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參數(shù)資料
| 型號： | MH28D72KLG-75 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 9,663,676,416-BIT (134,217,728-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module |
| 中文描述： | 9663676416位（134217728 - Word的72位），雙數(shù)據(jù)速率同步DRAM模塊 |
| 文件頁數(shù)： | 33/39頁 |
| 文件大?。?/td> | 337K |
| 代理商： | MH28D72KLG-75 |
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MITSUBISHI LSIs
MITSUBISHI ELECTRIC
MH28D72KLG-75,-10
9,663,676,416-BIT (134,217,728-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
MIT-DS-0412-0.1
21.Mar.2001
Preliminary Spec.
Some contents are subject to change without notice.
33
[Asynchronous SELF REFRESH]
Asynchronous Self -refresh mode is entered by CKE=L within 2 tCLK after issuing a REFA command
(/CS=/RAS=/CAS=L,/WE=H). Once the self-refresh is initiated, it is maintained as long as CKE is kept
low. During the self-refresh mode, CKE is asynchronous and the only enable input, all other inputs
including CLK are disabled and ignored, so that power consumption due to synchronous inputs is saved.
To exit the self-refresh, supplying stable CLK inputs, asserting DESEL or NOP command and then
asserting CKE for longer than tXSNR/tXSRD.
Asynchronous Self-Refresh
/RAS
CKE
/CS
/CAS
/WE
A0-12
BA0,1
tXSNR
Self Refresh Exit
max 2 tCLK
/CLK
CLK
Act
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PDF描述 |
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| MH28S72PJG-6 | Circular Connector; Body Material:Aluminum Alloy; Series:KPSE07; No. of Contacts:19; Connector Shell Size:14; Connecting Termination:Crimp; Circular Shell Style:Jam Nut Receptacle; Circular Contact Gender:Socket RoHS Compliant: No |
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