參數(shù)資料
型號: MCZ34701EWR2
廠商: 飛思卡爾半導體(中國)有限公司
英文描述: 1.5A Switch-Mode Power Supply with Linear Regulator
中文描述: 1.5A的開關模式電源,線性穩(wěn)壓器
文件頁數(shù): 28/39頁
文件大?。?/td> 528K
代理商: MCZ34701EWR2
Analog Integrated Circuit Device Data
Freescale Semiconductor
28
34701
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
Figure 24. Voltage Margining Programming
(One Supply Only)
Note:
x bits, which set the voltage margining value are
defined in
Table 8
.
WATCHDOG PROGRAMMING OPERATION
For watchdog operation control, the master periodically
sends a watchdog first command followed by a command
byte selecting, or confirming, the watchdog period according
to the options listed in
Table 8
. See
Figure 25
for the
watchdog timer programming command example.
The internal watchdog timer is turned ON by receiving a
valid watchdog programming command (after receiving the
watchdog programming first command), and it is cleared
each time the next watchdog programming command is
written into the device, provided it arrives during the window
open time. Thus, the watchdog programming command
clears the timer and sets the new timing conditions at the
same time. The watchdog programming first command
01100000 sent twice shuts the timer OFF, and the watchdog
function is disabled. Any other valid watchdog command
turns the timer ON again.
Figure 25. Watchdog Timer Programming
Note:
x bits, which set the watchdog timer value are
defined in
Table 8
, page
27
.
Communication Stop
Only the master can terminate the data transfer by issuing
a STOP condition. The slave waits for this condition to
resume its initial state waiting for the next START condition
(see
Figure 26
).
COMPLETE DATA TRANSFER EXAMPLES
The master device controlling the I
2
C bus always starts
addressing a 34701 slave IC in writing mode (R/W = 0) to
enable it to write a command byte just after receiving the
address acknowledge sent by 34702. I
2
C bus protocol
defines this circumstance as a master-transmitter and slave-
receiver configuration.
Figure 27
illustrates a communication beginning with the
slave address, the
first command
for voltage margining, and
a third byte containing the address field
001
and the value
field
00101
corresponding with the LDO fifth setting (LDO
output voltage = +5% above its nominal value). If a
simultaneous setting for switcher is needed, a fourth byte
should be included before the STOP condition (P); for
instance,
001 11100
to set the switcher in its twelfth setting
(switcher output voltage = -5% below its nominal value) - see
Figure 28
.
The example of data transfer setting the watchdog timer is
shown in the
Figure 26
.
Figure 26. Data Transfer Example - Watch Dog Timer
Setting.
Figure 27. Data Transfer Example - LDO Voltage
Margining
0 0
0 0 0 0 0
1
0
0
1
x
x
x
x
x
First Byte for Voltage Margining
Command Byte
Ack
0 1
0 0 0 0 0
1
1
0
1
x
x
x
x
x
First Byte for Watchdog Programming Command Byte
Ack
START
Slave Address
Write
First Command
for Watchdog Programming
Address Field Value Field:
Time-out WD = 320 ms
(Window OFF)
STOP
P
Ack
A6
A4
A0
0
1
1
0
0
0
Ack
0
0
Ack
0
1
1
0
1
0
0
1
S
A5
A3 A2 A1
0
START
Slave Address
Write
First Command
for Voltage Margining
Address Field Value Field = LDO
5th Setting
STOP
P
Ack
A6
A4
A0
0
0
1
0
0
0
Ack
0
0
Ack
0
0
1
0
0
1
0
1
S
A5
A3 A2 A1
0
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