參數(shù)資料
型號(hào): MCZ33977EG
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述: Single Gauge Driver
中文描述: 單表驅(qū)動(dòng)
文件頁(yè)數(shù): 22/37頁(yè)
文件大?。?/td> 402K
代理商: MCZ33977EG
Analog Integrated Circuit Device Data
Freescale Semiconductor
22
33977
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
The device is controlled by the microprocessor and reports
back status information via the SPI. This section provides a
detailed description of all registers accessible via serial
interface. The various registers control the behavior of this
device.
A message is transmitted by the master beginning with the
MSB (D15) and ending with the LSB (D0). Multiple messages
can be transmitted in succession to accommodate those
applications where daisy chaining is desirable, or to confirm
transmitted data, as long as the messages are all multiples of
16 bits. Data is transferred through daisy-chained devices, as
illustrated in
Figure 12
. If an attempt is made to latch in a
message smaller than 16 bits wide, it is ignored.
Table 8
lists the five registers the 33977 uses to configure
the device, control the state of the [Chgd to
two
per D.
Mortensen] two H-bridge outputs, and determine the type of
status information [
that is
deleted PV] clocked back to the
master. The registers are addressed via D15:D13 of the
incoming SPI word.
Table 8. Module Memory Map
[The word Zero omitted above in 101 my error]
MODULE MEMORY MAP
Various registers of the 33977 SPI module are addressed
by the three MSBs of the 16-bit word received serially.
Functions to be controlled include:
Individual gauge drive enabling
Power-up/down
Internal clock calibration
Gauge pointer position and velocity
Gauge pointer zeroing
Air core motor movement emulation
Status information
Status reporting includes:
Individual gauge overtemperature condition
Battery overvoltage
Battery undervoltage
Pointer zeroing status
Internal clock status
Confirmation of pointer movement commands
Real time pointer position information
Real time pointer velocity step information
Pointer movement direction
Command pointer position status
RTZ accumulator value
REGISTER DESCRIPTIONS
The following section describes the registers, their
addresses, and their impact on device operation.
ADDRESS 000 - POWER, ENABLE, CALIBRATION,
AND CONFIGURATION REGISTER (PECCR)
The Power, Enable, Calibration, and Configuration
Register is illustrated in
Table 9
. A write to the 33977 using
this register allows the master to:
Enable or disable the output drivers of the gauge
controller
Calibrate the internal clock
Disable the air core emulation
Select the direction of the pointer movement during
pointer positioning and zeroing
Configure the device for the desired status information
to be clocked out into the SO pin, or
Send a null command for the purpose of reading the
status bits.
This register is also used to place the 33977 into a low
current consumption mode.
The gauge drivers can be enabled by writing Logic [1] to
the assigned address bits, PE0. This feature could be used
to disable a driver if it is failing. The device can be placed into
a standby current mode by writing Logic [0] to PE0. During
this state, most current consuming circuits are biased off.
When in the Standby mode, the internal clock will remain ON.
The internal state machine utilizes a ROM table of step
times defining the duration that the motor will spend at each
microstep as it accelerates or decelerates to a commanded
position. The accuracy of the acceleration and velocity of the
motor is directly related to the accuracy of the internal clock
Although the accuracy of the internal clock is temperature
independent, the non-calibrated tolerance is +70% to -35%.
The 33977 was designed with a feature allowing the internal
clock to be software calibrated to a tighter tolerance of ±10%,
using the CS
pin and a reference time pulse provided by the
microcontroller.
Calibration of the internal clock is initiated by writing Logic
[1] to PE3. The calibration pulse, which must be 8.0
μ
s for an
internal clock speed of 1.0 MHz, will be sent on the CS
pin
immediately after the SPI word is sent. No other SPI lines will
be toggled. A clock calibration will be allowed only if the
gauge is disabled or the pointer is not moving, as indicated
Address
[15:
13
]
Register
Name
See
000
Power, Enable, Calibration, and
Configuration Register
PECCR
Table
9
001
Maximum Velocity Register
VELR
Table
10
010
Gauge Position Register
POSR
Table
11
011
Not Used
100
Return to Zero Register
RTZR
Table
12
101
Return to Zero Configuration
Register
RTZCR
Table
13
110
Not Used
RMPSELR
111
Reserved for Test
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