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參數(shù)資料
| 型號(hào)： | MCZ33977EG |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | Single Gauge Driver |
| 中文描述： | 單表驅(qū)動(dòng) |
| 文件頁數(shù)： | 16/37頁 |
| 文件大?。?/td> | 402K |
| 代理商： | MCZ33977EG |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
16
33977
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
INTERNAL CLOCK CALIBRATION
Timing-related functions on the 33977 (e.g., pointer,
velocities, acceleration, and Return to Zero Pointer speeds)
depend upon a precise, consistent time reference to control
the pointer accurately and reliably. Generating accurate time
references on an integrated circuit can be accomplished.
There are three methods to generate accurate time
references on an integrated circuit:
1. One option is trimming; however, timing tends to be
costly due to the large amount of die area required for
trim pads.
2. Another, but expensive possibility is an externally
generated clock signal. This option requires a
dedicated pin on the device and controller.
3. A third, and even more expensive approach requires
the use of an additional crystal, or resonator.
The internal clock in the 33977 is temperature
independent and area efficient; however, it can vary up to 70
percent due to process variation. Using the existing SPI
inputs and the precision timing reference already available to
the microcontroller, the 33977 allows more accurate clock
calibration to within ±10 percent without requiring extra pins,
components, or costly circuitry.
Calibrating the internal 1.0 MHz clock is initiated by writing
Logic [1] to PECCR bit PE3, illustrated in
Figure 8
.
Figure 8. Gauge Enable and Clock Calibration Example
The 8.0
μ
s calibration pulse is then provided by the
controller to result in a nominal internal 33977 clock speed of
1.0 MHz. The pulse is sent on the CS pin immediately after
the SPI calibration command is sent. During the calibration,
no other SPI lines should be toggled. At the moment the CS
pin transitions from Logic [1] to Logic [0], an internal 7-bit
counter counts the number of cycles of an internal, 8.0 MHz
clock. The counter stops when the CS pin transitions from
Logic [0] to Logic [1]. The value in the counter represents the
number of cycles of the 8.0 MHz clock occurring in the 8.0
μ
s
window; it should range from 32 to 119. An offset is added to
this number to help center, or skew, the calibrated result to
generate a desired maximum, or normal frequency. The
modified counter value is truncated by four bits to generate
the calibration divisor, potentially ranging from four to 15. The
8.0 MHz clock is divided by the calibration divisor, resulting in
a calibrated 1.0 MHz clock. If the calibration divisor lies
outside the range of four to 15, the 33977 flags the CAL bit in
the device Status register, indicating the calibration
procedure was not successful. A clock calibration is allowed
only if the gauge is disabled, or the pointer is not moving as
indicated by the Status bit of MOV, illustrated in
Table 16
section of this document.
Some applications may require a guaranteed maximum
pointer velocity and acceleration. Guaranteeing these
maximums requires the nominal internal clock frequency to
fall below 1.0 MHz. The frequency range of the calibrated
clock is always below 1.0 MHz if PECCR bit PE4 is Logic [0]
prior to initiating a calibration command, followed by an 8.0
μ
s
reference pulse. The frequency is centered at 1.0 MHz if bit
D4 is written Logic [1].
The 33977 can be fooled into calibrating faster or slower
than the optimal frequency by sending a calibration pulse
longer or shorter than the intended 8.0
μ
s. As long as the
calibration divisor remains between four and 15 there is no
calibration flag. For applications requiring a slower calibrated
clock, e.g., a motor designed with a gear ratio of 120:1
(8 microsteps/deg), users will have to provide a longer
calibration pulse. The internal oscillator can be slowed with
the PECCR command, so the calibration divisor safely falls
within the four to 15 range when calibrating with a longer time
reference. Fro example, for the 120:1 motor, the pulse would
be 12
μ
s instead of 8.0
μ
s. The result of this slower calibration
is longer step times resulting in generating pointer
movements capable of meeting acceleration and velocity
requirements. The resolution of the pointer positioning
decreases from 0.083 deg/microstep (180:1) to 0.125
deg/microstep (120:1) while the pointer sweep range
increases from approximately 340° to over 500°.
Note:
A fast calibration could result in violations of the
motor acceleration and a velocity maximums, resulting in
missed steps.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCZ33977EG | 制造商:Freescale Semiconductor 功能描述:IC STEPPER MOTOR GAUGE DRIVER SPI |
| MCZ33977EGR2 | 功能描述:馬達(dá)/運(yùn)動(dòng)/點(diǎn)火控制器和驅(qū)動(dòng)器 SINGLE GAUGE DR. LG. PTR RoHS:否 制造商:STMicroelectronics 產(chǎn)品:Stepper Motor Controllers / Drivers 類型:2 Phase Stepper Motor Driver 工作電源電壓:8 V to 45 V 電源電流:0.5 mA 工作溫度:- 25 C to + 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HTSSOP-28 封裝:Tube |
| MCZ33989EG | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC SBC-HS RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| MCZ33989EG | 制造商:Freescale Semiconductor 功能描述:IC SYSTEM BASIS W/CAN TRANCEIVER |
| MCZ33989EGR2 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC SBC-HS RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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