參數(shù)資料
型號(hào): MCZ33784EFR2
廠商: Freescale Semiconductor
文件頁數(shù): 23/30頁
文件大小: 0K
描述: IC SENSOR DBUS DSI 2.02 16-SOIC
標(biāo)準(zhǔn)包裝: 2,500
類型: 傳感器接口
輸入類型: 模擬
輸出類型: 數(shù)字
接口: 總線
電流 - 電源: 4mA
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC N
包裝: 帶卷 (TR)
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
33784
PIN CONNECTIONS
PIN CONNECTIONS
Figure 3. 33784 Pin Connections
Table 1. 33784 Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on page 10.
Pin Number
Pin Name
Pin
Function
Formal Name
Definition
1
REGOUT
Output
Regulator
Output
Pin provides a regulated 5.0V output. The power is derived from the bus.
2
TEST2
Test
Test2
This pin must be grounded in the application.
3
4
5
I/O0
I/O1
I/O2
Input/Output
Logic I/O
Pins can be used to provide a logic level output or a logic input.
6, 8
AN0,AN1
Input
Analog Input
Inputs to the ADC.
7
AGND
Ground
Reference
Analog Ground
Pin is the low reference level and power return for the analog-to-digital
converter (ADC). It is internally connected to RTNIN.
9
TEST1
Test
Test1
This pin must be grounded in the application.
10
IDDQ
Test
IDDQ
Input pin for measuring device quiescent current. Must be left open in the
application.
11
TOUT
Test
Test Output
This pin must be grounded in the application.
12
RTNOUT
Power
Bus Return
Switched RTNIN pin, attaches to the next RTNIN pin in the daisy chain.
13
RTNIN
Power
Bus Return
Pin attaches to the low side of the differential bus, and provides the common
return for power and signalling. It is internally connected to AGND.
14
BUSOUT
Output
DBUS Output
Switched BUSIN Pin, attaches to the next BUSIN pin in the daisy chain.
15
BUSIN
Input
DBUS Input
Pin attaches to the high side of the differential bus and responds to
initialization commands.
16
H_CAP
Output
Holding
Capacitor
A capacitor attached to this pin is charged by the bus during bus idle and
supplies current to run the device and for external devices via the REGOUT
pin during non-idle periods.
REGOUT
TEST2
I/O0
I/O1
I/O2
AN0
AGND
AN1
H_CAP
BUSIN
BUSOUT
RTNIN
RTNOUT
TOUT
IDDQ
TEST1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
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