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參數(shù)資料
| 型號： | MCM64E918 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 8M Bit synchronous late write fast static RAM(8M位同步遲寫快速靜態(tài)RAM) |
| 中文描述： | 晚8分位同步靜態(tài)隨機存儲器寫入速度（800萬位同步遲寫快速靜態(tài)內(nèi)存） |
| 文件頁數(shù)： | 8/24頁 |
| 文件大?。?/td> | 503K |
| 代理商： | MCM64E918 |
MCM64E918
MCM64E836
8
MOTOROLA FAST SRAM
DC CHARACTERISTICS AND POWER SUPPLY CURRENTS
(See Notes 1 and 2)
Parameter
Symbol
Min
Typ
Max
Unit
DC Input Logic High
VIH (DC)
VIL (DC)
Ilkg(I)
IOL
Vref + 0.1
–0.5
—
VDDQ + 0.3
Vref – 0.1
±
5
V
DC Input Logic Low
—
V
Input Leakage Current (All Inputs, Vin = 0 to VDDQ)
Output Low Current (VOL = VDDQ/2)
—
—
μ
A
(VDDQ/2) /
[(RQ/5) + 10%]
—
(VDDQ/2) /
[(RQ/5) – 10%]
V
Output High Current (VOH = VDDQ/2)
IOH
(VDDQ/2) /
[(RQ/5) + 10%]
—
(VDDQ/2) /
[(RQ/5) – 10%]
V
Light Load Output Logic Low
IOL
≤
100
μ
A
VOL1
VSS
—
0.2
V
Light Load Output Logic High
IOH
≤
100
μ
A
VOH1
VDDQ – 0.2
—
VDDQ
V
Clock Input Signal Voltage
Vin
–0.3
—
VDDQ + 0.3
VDDQ + 0.6
1.3
V
Clock Input Differential Voltage (See Figure 2)
VDIF (DC)
VCM (DC)
0.1
—
V
Clock Input Common Mode Voltage Range
(See Figure 2)
0.6
—
V
NOTES:
1. The impedance controlled mode is expected to be used in point–to–point applications, driving high–impedance inputs.
2. The ZQ pin is connected through RQ to VSS for the controlled impedance mode.
CAPACITANCE
(f = 1.0 MHz, dV = 3.0 V, 0
°
C
≤
TA
≤
70
°
C, Periodically Sampled Rather Than 100% Tested)
Characteristic
Symbol
Typ
Max
Unit
Input Capacitance
All Inputs Except Clocks and DQs
G and W
Cin
Cck
3.2
3.7
5
5
pF
I/O Capacitance
DQ
CI/O
3.8
6
pF
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