參數(shù)資料
型號: MCM63Z736
廠商: Motorola, Inc.
英文描述: 128K x 36 Bit Synchronous Fast Static RAM(128K x 36位同步快速靜態(tài)RAM)
中文描述: 128K的× 36位同步快速靜態(tài)存儲器(128K的× 36位同步快速靜態(tài)內(nèi)存)
文件頁數(shù): 10/20頁
文件大小: 135K
代理商: MCM63Z736
MCM63Z736 MCM63Z818
10
MOTOROLA FAST SRAM
ABSOLUTE MAXIMUM RATINGS
(See Note 1)
Rating
Symbol
Value
Unit
Notes
Power Supply Voltage
VDD
VDDQ
Vin, Vout
–0.5 to 4.6
V
I/O Supply Voltage
VSS – 0.5 to VDD
–0.5 to VDD + 0.5
V
2
Input Voltage Relative to VSS for
Any Pin Except VDD
V
2
Input Voltage (Three State I/O)
VIT
VSS – 0.5 to
VDDQ + 0.5
V
2
Output Current (per I/O)
Iout
PD
Tbias
Tstg
±
20
mA
Package Power Dissipation
1.3
W
3
Temperature Under Bias
–10 to 85
°
C
Storage Temperature
–55 to 125
°
C
NOTES:
1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
exceeded. Functional operation should be restricted to RECOMMENDED
OPERATING CONDITIONS. Exposure to higher than recommended voltages for
extended periods of time could affect device reliability.
2. This is a steady–state DC parameter that is in effect after the power supply has
achieved its nominal operating level. Power sequencing is not necessary.
3. Power dissipation capability is dependent upon package characteristics and use
environment. See Package Thermal Characteristics.
PACKAGE THERMAL CHARACTERISTICS
Thermal Resistance
Symbol
Max
Unit
Notes
Junction to Ambient (@ 200 lfm)
Single–Layer Board
Four–Layer Board
R
θ
JA
40
25
°
C/W
1, 2
Junction to Board (Bottom)
R
θ
JB
R
θ
JC
17
°
C/W
3
Junction to Case (Top)
9
°
C/W
4
NOTES:
1. Junction temperature is a function of on–chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient
temperature, air flow, board population, and board thermal resistance.
2. Per SEMI G38–87.
3. Indicates the average thermal resistance between the die and the printed circuit board.
4. Indicates the average thermal resistance between the die and the case top surface via the cold plate method (MIL SPEC–883
Method 1012.1).
This device contains circuitry to protect the
inputs against damage due to high static volt-
ages or electric fields; however, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi-
mum rated voltages to this high–impedance
circuit.
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