參數(shù)資料
型號(hào)： MCF5372
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： Microprocessor Data Sheet
中文描述： 微處理器數(shù)據(jù)表
文件頁(yè)數(shù)： 22/42頁(yè)
文件大?。?/td> 787K
代理商： MCF5372
MCF5373 ColdFire
Microprocessor Data Sheet, Rev. 0.3
Preliminary
Preliminary Electrical Characteristics
Freescale Semiconductor
22
Figure 10. General Input Timing Requirements
5.7.1
FlexBus
A multi-function external bus interface called FlexBus is provided with basic functionality to interface to
slave-only devices up to a maximum bus frequency of 80MHz. It can be directly connected to
asynchronous or synchronous devices such as external boot ROMs, flash memories, gate-array logic, or
other simple target (slave) devices with little or no additional circuitry. For asynchronous devices a simple
chip-select based interface can be used. The FlexBus interface has six general purpose chip-selects
(FB_CS[5:0]) which can be configured to be distributed between the FlexBus or SDRAM memory
interfaces. Chip-select, FB_CS0 can be dedicated to boot ROM access and can be programmed to be byte
(8 bits), word (16 bits), or longword (32 bits) wide. Control signal timing is compatible with common
ROM/flash memories.
5.7.1.1
The following timing numbers indicate when data will be latched or driven onto the external bus, relative
to the system clock.
FlexBus AC Timing Characteristics
Invalid
Invalid
FB_CLK (80MHz)
TSETUP
THOLD
Input Setup And Hold
1.5V
t
rise
V
h
= V
IH
V
l
= V
IL
1.5V
1.5V
Valid
t
fall
V
h
= V
IH
V
l
= V
IL
Input Rise Time
Input Fall Time
* The timings are also valid for inputs sampled on the negative clock edge.
Inputs
FB_CLK
B4
B5
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