參數(shù)資料
型號(hào): MC850DECZQ50BUR2
廠商: Freescale Semiconductor
文件頁數(shù): 64/72頁
文件大?。?/td> 0K
描述: IC MPU PQUICC 50MHZ 256-PBGA
標(biāo)準(zhǔn)包裝: 500
系列: MPC8xx
處理器類型: 32-位 MPC8xx PowerQUICC
速度: 50MHz
電壓: 3.3V
安裝類型: 表面貼裝
封裝/外殼: 256-BGA
供應(yīng)商設(shè)備封裝: 256-PBGA(23x23)
包裝: 帶卷 (TR)
MPC850 PowerQUICC Integrated Communications Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
67
Mechanical Data and Ordering Information
Figure 65 shows the JEDEC package dimensions of the PBGA.
Figure 65. Package Dimensions for the Plastic Ball Grid Array (PBGA)—JEDEC Standard
U
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
256X
BOTTOM VIEW
E
0.20
7
6
5
4
3
2
b
0.15
C
D
D2
E2
A
B
0.30
C AB
SIDE VIEW
DIM
MIN
MAX
MILLIMETERS
A
1.91
2.35
A1
0.50
0.70
A2
1.12
1.22
A3
0.29
0.43
b
0.60
0.90
D
23.00 BSC
D1
19.05 REF
D2
E
23.00 BSC
E1
19.05 REF
E2
19.00
20.00
NOTES:
1.
DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2.
DIMENSIONS IN MILLIMETERS.
3.
DIMENSION b IS MEASURED AT THE MAXIMUM
SOLDER BALL DIAMETER, PARALLEL TO PRIMARY
DATUM C.
4.
PRIMARY DATUM C AND THE SEATING PLANE ARE
4X
8 9 10 11 12 13 14 15 16
M
TOP VIEW
(D1)
15X
e
15X
e
(E1)
4X
e/2
0.20 C
0.35 C
A3
256X
C
A
A1
A2
SEATING
PLANE
e
1.27 BSC
19.00
20.00
17
CASE 1130-01
ISSUE B
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