參數(shù)資料
型號: MC850DECZQ50BUR2
廠商: Freescale Semiconductor
文件頁數(shù): 32/72頁
文件大?。?/td> 0K
描述: IC MPU PQUICC 50MHZ 256-PBGA
標(biāo)準(zhǔn)包裝: 500
系列: MPC8xx
處理器類型: 32-位 MPC8xx PowerQUICC
速度: 50MHz
電壓: 3.3V
安裝類型: 表面貼裝
封裝/外殼: 256-BGA
供應(yīng)商設(shè)備封裝: 256-PBGA(23x23)
包裝: 帶卷 (TR)
MPC850 PowerQUICC Integrated Communications Processor Hardware Specifications, Rev. 2
38
Freescale Semiconductor
Bus Signal Timing
Figure 31 shows the reset timing for the data bus configuration.
Figure 31. Reset Timing—Configuration from Data Bus
Figure 32 provides the reset timing for the data bus weak drive during configuration.
Figure 32. Reset Timing—Data Bus Weak Drive during Configuration
HRESET
RSTCONF
D[0:31] (IN)
R71
R74
R73
R75
R76
CLKOUT
HRESET
D[0:31] (OUT)
(Weak)
RSTCONF
R69
R79
R77
R78
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