參數(shù)資料
型號: MC850DECZQ50BUR2
廠商: Freescale Semiconductor
文件頁數(shù): 24/72頁
文件大?。?/td> 0K
描述: IC MPU PQUICC 50MHZ 256-PBGA
標準包裝: 500
系列: MPC8xx
處理器類型: 32-位 MPC8xx PowerQUICC
速度: 50MHz
電壓: 3.3V
安裝類型: 表面貼裝
封裝/外殼: 256-BGA
供應商設備封裝: 256-PBGA(23x23)
包裝: 帶卷 (TR)
MPC850 PowerQUICC Integrated Communications Processor Hardware Specifications, Rev. 2
30
Freescale Semiconductor
Bus Signal Timing
Figure 19 provides the timing for the synchronous external master access controlled by the GPCM.
Figure 19. Synchronous External Master Access Timing (GPCM Handled ACS = 00)
Figure 20 provides the timing for the asynchronous external master memory access controlled by the
GPCM.
Figure 20. Asynchronous External Master Memory Access Timing (GPCM Controlled—ACS = 00)
Figure 21 provides the timing for the asynchronous external master control signals negation.
Figure 21. Asynchronous External Master—Control Signals Negation Timing
CLKOUT
TS
A[6:31],
TSIZ[0:1],
R/W, BURST
CSx
B41
B42
B40
B22
CLKOUT
AS
A[6:31],
TSIZ[0:1],
R/W
CSx
B39
B40
B22
AS
CSx, WE[0:3],
OE, GPLx,
BS[0:3]
B43
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