參數(shù)資料
型號(hào)： MC7410VU400NE
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 11/56頁(yè)
文件大?。?/td> 0K
描述： IC MPU RISC 32BIT 360-FCCBGA
標(biāo)準(zhǔn)包裝： 44
系列： MPC74xx
處理器類型： 32-位 MPC74xx PowerPC
速度： 400MHz
電壓： 1.5V
安裝類型： 表面貼裝
封裝/外殼： 360-BCBGA，F(xiàn)CCBGA
供應(yīng)商設(shè)備封裝： 360-FCCBGA（25x25）
包裝： 托盤
MPC7410 RISC Microprocessor Hardware Specifications, Rev. 6.1
Freescale Semiconductor
19
Electrical and Thermal Characteristics
The L2CLK_OUT timing diagram is shown in Figure 7.
Figure 7. L2CLK_OUT Output Timing Diagram
L2CLK_OUT output jitter
—
±150
—
±150
—
±150
ps
6
Notes:
1. L2CLK outputs are L2CLK_OUTA, L2CLK_OUTB, and L2SYNC_OUT pins. The L2CLK frequency to core
frequency settings must be chosen such that the resulting L2CLK frequency and core frequency do not exceed their
respective maximum or minimum operating frequencies. The maximum L2CLK frequency will be system
dependent. L2CLK_OUTA and L2CLK_OUTB must have equal loading.
2. The nominal duty cycle of the L2CLK is 50% measured at midpoint voltage.
3. The DLL-relock time is specified in terms of L2CLKs. The number in the table must be multiplied by the period of
L2CLK to compute the actual time duration in ns. Relock timing is guaranteed by design and characterization.
4. The L2CR[L2SL] bit should be set for L2CLK frequencies less than 150 MHz. This adds more delay to each tap of
the DLL.
5. Allowable skew between L2SYNC_OUT and L2SYNC_IN.
6. Guaranteed by design and not tested. This output jitter number represents the maximum delay of one tap forward
or one tap back from the current DLL tap as the phase comparator seeks to minimize the phase difference between
L2SYNC_IN and the internal L2CLK. This number must be comprehended in the L2 timing analysis. The input jitter
on SYSCLK affects L2CLK_OUT and the L2 address/data/control signals equally and, therefore, is already
comprehended in the AC timing and does not have to be considered in the L2 timing analysis.
Table 9. L2CLK Output AC Timing Specifications (continued)
At recommended operating conditions (see Table 3)
Parameter
Symbol
400 MHz
450 MHz
500 MHz
Unit
Notes
Min
Max
Min
Max
Min
Max
VM = Midpoint Voltage (L2O
VDD/2)
L2CLK_OUTA
L2CLK_OUTB
L2 Differential Clock Mode
L2 Single-Ended Clock Mode
L2SYNC_OUT
tL2CLK
tCHCL
L2CLK_OUTA
VM
tL2CR
tL2CF
VM
L2CLK_OUTB
VM
tL2CLK
tCHCL
L2SYNC_OUT
VM
tL2CSKW
VM
相關(guān)PDF資料
PDF描述
MC68MH360ZP33LR2 IC MPU QUICC 33MHZ 357-PBGA
MC68MH360ZP25LR2 IC MPU QUICC 25MHZ 357-PBGA
IDT70V657S12DR IC SRAM 1.125MBIT 12NS 208QFP
IDT70V3579S4DR IC SRAM 1.125MBIT 4NS 208QFP
IDT70V3389S4PRF IC SRAM 1.125MBIT 4NS 128TQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC7410VU450NE 功能描述:微處理器 - MPU NITRO RV 1.4 ROHS RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MC7410VU500LE 功能描述:微處理器 - MPU REV 1.4 105C PB FREE RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MC7411MEL 制造商:Rochester Electronics LLC 功能描述:- Bulk
MC7412 制造商:SHENZHENFREESCALE 制造商全稱:ShenZhen FreesCale Electronics. Co., Ltd 功能描述:N-Channel 20V (D-S) MOSFET High performance trench technology
MC7413 制造商:SHENZHENFREESCALE 制造商全稱:ShenZhen FreesCale Electronics. Co., Ltd 功能描述:P-Channel 20-V (D-S) MOSFET High performance trench technology
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*