參數(shù)資料
型號： MC68HC705SB7
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封裝： SOIC-28
文件頁數(shù)： 86/170頁
文件大?。?/td> 2161K
代理商： MC68HC705SB7
GENERAL RELEASE SPECIFICATION
August 27, 1998
MOTOROLA
MEMORY
MC68HC05SB7
2-2
REV 2.1
2.2
INPUT/OUTPUT SECTION
The rst 48 addresses of the memory space, $0000 – $002F, are the I/O section
as summarized in Figure 2-2. These are the addresses of the I/O control regis-
ters, status registers, and data registers. Reading from unimplemented locations
will return unknown states, and writing to unimplemented locations will be ignored.
One I/O register is located outside the 48-byte I/O section which is the computer
operating properly (COP) register, mapped at $1FF0.
The assignment of each control, status, and data bit in the I/O register space from
$0000 through $002F are given in Figure 2-3, Figure 2-4, and Figure 2-5.
Addr.
Register Name
Addr.
Register Name
$0000
Port A Data Register
$0018
Timer Counter Register MSB
$0001
Port B Data Register
$0019
Timer Counter Register LSB
$0002
Port C Data Register
$001A
Alternate Counter Register MSB
$0003
Analog MUX Register 1
$001B
Alternate Counter Register LSB
$0004
Port A Data Direction Register
$001C
Reserved
$0005
Port B Data Direction Register
$001D
Analog Control Register
$0006
Port C Data Direction Register
$001E
Analog Status Register
$0007
Analog MUX Register 2
$001F
Reserved
$0008
Core Timer Status & Control Register
$0020
SM-Bus Address Register
$0009
Core Timer Counter
$0021
SM-Bus Frequency Select Register
$000A
CSA Status/Control Register
$0022
SM-Bus Control Register
$000B
Miscellaneous Control Register
$0023
SM-Bus Status Register
$000C
VCO Adjust Register
$0024
SM-Bus Data Register
$000D
IRQ Status & Control Register
$0025
D/A Register 0 H
$000E
Personality EPROM Bit Select Register
$0026
D/A Register 0 L
$000F
Personality EPROM Status & Control Reg.
$0027
D/A Register 1 H
$0010
Reserved
$0028
D/A Register 1 L
$0011
Reserved
$0029
D/A Register 2 H
$0012
Timer Control Register
$002A
D/A Register 2 L
$0013
Timer Status Register
$002B
D/A Register 3 H
$0014
Input Capture Register MSB
$002C
D/A Register 3 L
$0015
Input Capture Register LSB
$002D
MUX Channel Enable Register
$0016
Output Compare Register MSB
$002E
Reserved
$0017
Output Compare Register LSB
$002F
Reserved
Figure 2-2. MC68HC05SB7 I/O Registers
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