參數(shù)資料
型號: MC68HC705SB7
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封裝: SOIC-28
文件頁數(shù): 121/170頁
文件大?。?/td> 2161K
代理商: MC68HC705SB7
GENERAL RELEASE SPECIFICATION
August 27, 1998
MOTOROLA
SYSTEM CLOCK
MC68HC05SB7
8-2
REV 2.1
The clock source is selected by the VCOEN bit in the IRQ Status and Control Reg-
ister at $0D. Table 8-1 shows a summary of the clock source selection.
VCOEN — VCO ENable
1 =
Internal VCO is used as clock source for the MCU.
This is the default setting after a reset.
0 =
External OSC is used as clock source for the MCU. If external OSC
is disabled (mask option or MOR in MC68HC705SB7), the internal
VCO is used as clock source.
After a POR or reset, the internal VCO is selected as the default clock source.
.
NOTE
The user must ensure that the oscillators are stable (4096 clock cycles minimum)
if switching between internal and external oscillators.
8.2
VCO CLOCK SPEED
8.2.1 VCO Slow Mode
The internal VCO has two operating modes: Normal mode and Slow mode.
In Normal mode, the VCO frequency ranges from 1.5MHz to 5.8MHz.
In Slow mode, the VCO frequency ranges from 500Hz to 4kHz.
This clock speed option is selected by setting the SCLK bit in the Miscellaneous
Register at $0B. The default setting at reset is Normal mode.
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
ISCR
R
IRQE
VCOEN
LEVEL
0
IRQF
0
$000D
W
IRQR
reset:
11000000
Figure 8-2. IRQ Status and Control Register (ISCR)
Table 8-1. Clock Source Selection
External OSC Enabled
(Mask Option)
Internal VCO Enabled
Clock Source Selected
Disabled
(OSCS=0 in MC68HC705SB7)
Don’t care
(VCOEN=X)
Internal
Enabled
(OSCS=1 in MC68HC705SB7)
Disabled
(VCOEN=0)
External
Enabled
(OSCS=1 in MC68HC705SB7)
Enabled
(VCOEN=1)
Internal
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