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參數(shù)資料
| 型號(hào)： | MC68HC16Y1 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 16-Bit Modular Microcontroller(16位模塊化微控制器) |
| 中文描述： | 16位微控制器模塊（16位模塊化微控制器） |
| 文件頁數(shù)： | 67/122頁 |
| 文件大?。?/td> | 749K |
| 代理商： | MC68HC16Y1 |
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MC68HC16Y1
MC68HC16Y1TS/D
MOTOROLA
67
This field only affects the response of chip selects and does not affect interrupt recognition by the CPU.
“All” means that a chip select signal is asserted regardless of the priority of the interrupt.
AVEC — Autovector Enable
0 = External interrupt vector enabled
1 = Autovector enabled
This field selects one of two methods of acquiring the interrupt vector during the interrupt acknowledge
cycle. It is not generally used in conjunction with a chip select pin.
If the chip select is configured to trigger on an interrupt acknowledge cycle (SPACE = %00) and the
AVEC field is set to one, the chip select automatically generates an AVEC in response to the interrupt
acknowledge cycle. Otherwise, the vector must be supplied by the requesting device.
The pin data register controls the state of pins programmed as Port C discrete outputs. When a pin is
assigned as a discrete output, the value in this register appears at the output. PC[6:0] correspond to
pins CS[9:3]. This is a read/write register. Bit 7 is not used. Writing to this bit has no effect, and it always
reads zero.
3.10.5 Chip Select Reset Operation
The reset values of the chip select pin assignment fields in CSPAR0 and CSPAR1 depend on the op-
erating mode selected. Refer to the discussion of these registers for more information.
The CSBOOT assignment field in CSPAR0 is configured differently. The MSB, bit 1 of CSPAR0, is al-
ways one. This enables the CSBOOT signal to select a boot ROM containing initialization firmware. The
LSB value, determined by the logic level of DATA0 during reset, selects boot ROM port size. When
DATA0 is held low, port size is eight bits. When internal connections pull the LSB high, port size is 16
bits.
After reset, the MCU fetches initialization vectors from addresses $0000 to $0006 in bank 0 of program
space. To support bootstrap operation from reset, the base address field in chip select base register
boot (CSBARBT) has a reset value of all zeros. A ROM device containing vectors located at these ad-
dresses can be enabled by CSBOOT after a reset. The block size field in CSBARBT has a reset value
of 512 Kbytes.
IPL
000
001
010
011
100
101
110
111
Space = 00
All
IPL1
IPL2
IPL3
IPL4
IPL5
IPL6
IPL7
Space = 01, 10, 11
Data or Program
Data
Program
Reserved
Reserved
Data
Program
Reserved
PORTC
— Port C Data Register
$YFFA41
7
0
6
5
4
3
2
1
0
PC6
PC5
PC4
PC3
PC2
PC1
PC0
RESET:
0
1
1
1
1
1
1
1
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