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| 型號(hào)： | MC68HC16Y1 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 16-Bit Modular Microcontroller(16位模塊化微控制器) |
| 中文描述： | 16位微控制器模塊（16位模塊化微控制器） |
| 文件頁(yè)數(shù)： | 113/122頁(yè) |
| 文件大?。?/td> | 749K |
| 代理商： | MC68HC16Y1 |
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MC68HC16Y1
MC68HC16Y1TS/D
MOTOROLA
113
8 Standby RAM with TPU Emulation
The standby RAM with TPU emulation module (TPURAM) contains a 2-Kbyte array of fast (two bus cy-
cle) static RAM, which is especially useful for system stacks and variable storage. The RAM can be
used to emulate TPU microcode ROM. The TPURAM can be mapped to any 2-Kbyte boundary in the
address map, but must not overlap the module control registers — overlap makes the registers inac-
cessible. TPURAM responds to both program and data space accesses. Data can be read or written in
bytes, word, or long words. The RAM is powered by V
DD
in normal operation. During power-down, the
RAM contents are maintained by power on standby voltage pin V
STBY
. Power switching between sourc-
es is automatic.
8.1 TPURAM Register Block
TPURAM control registers occupy a 64-byte block. There are three TPURAM control registers in the
block: the RAM module configuration register (TRAMMCR), the RAM test register (TRAMTST), and the
RAM array base address register (TRAMBAR). The rest of the register block contains unimplemented
register locations. Unimplemented register addresses are read as zeros, and writes to them have no
effect.
Y = M111, where M is the state of the modmap bit in the module configuration register of the
single-chip integration module. In an MC68HC16Y1 system, M must always be set to one.
8.2 TPURAM Registers
Access to the TPURAM array is controlled by the RASP field in the TRAMMCR.
Bits in TRAMMCR determine whether the RAM is in low-power stop mode or normal mode, indicate fail-
ure of standby RAM power, and determine in which address space the array resides. Reads of unim-
plemented bits always return zeros. Writes do not affect unimplemented bits.
STOP — Stop Control Bit
0 = RAM array operates normally.
1 = RAM array enters low-power stop mode.
This bit controls whether the RAM array is in low-power consumption mode or operating normally. Reset
state is zero, for normal operation. In stop mode, the array retains its contents, but cannot be read or
written by the CPU.
Table 31 TPURAM Control Register Address Map
Address
$YFFB00
$YFFB02
$YFFB04
$YFFB06–
$YFFB3F
15
8 7
0
RAM MODULE CONFIGURATION REGISTER (TRAMMCR)
RAM TEST REGISTER (TRAMTST)
RAM BASE ADDRESS AND STATUS REGISTER (TRAMBAR)
NOT IMPLEMENTED
TRAMMCR
— RAM Module Configuration Register
$YFFB00
15
12
8
7
0
STOP
PDS
RASP
NOT USED
RESET:
0
U
U
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC16Z1CAG | 制造商:Freescale Semiconductor 功能描述: |
| MC68HC16Z1CAG16 | 功能描述:16位微控制器 - MCU 16 BIT MCU 1K RAM RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| MC68HC16Z1CAG16 | 制造商:Freescale Semiconductor 功能描述:IC16-BIT MICROCONTROLLER |
| MC68HC16Z1CAG20 | 功能描述:16位微控制器 - MCU 16 BIT MCU 1K RAM RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| MC68HC16Z1CAG20 | 制造商:Freescale Semiconductor 功能描述:Microcontroller |
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