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參數(shù)資料
| 型號(hào)： | MC68HC11FC0CFU5 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Technical Summary 8-Bit Microcontroller |
| 中文描述： | 8-BIT, 6 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | QFP-64 |
| 文件頁數(shù)： | 63/74頁 |
| 文件大?。?/td> | 513K |
| 代理商： | MC68HC11FC0CFU5 |
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MOTOROLA
MC68HC11F1/FC0
66
MC68HC11FTS/D
Bit 3 — Not implemented. Reads always return zero and writes have no effect.
Bits [2:0] — See 12.2 Timer Registers, page 63.
U = Unaffected by reset
This eight-bit read/write register contains the count of external input events at the PAI input, or the ac-
cumulated count. The PACNT is readable even if PAI is not active in gated time accumulation mode.
The counter is not affected by reset and can be read or written at any time. Counting is synchronized
to the internal PH2 clock so that incrementing and reading occur during opposite half cycles.
Table 33 Pulse Accumulator Edge Control
PAMOD
PEDGE
Action on Clock
0
PAI falling edge increments the counter.
0
1
PAI rising edge increments the counter.
1
0
A zero on PAI inhibits counting.
1
A one on PAI inhibits counting.
PACNT — Pulse Accumulator Count
$x027
Bit 7
6
5
4
3
2
1
Bit 0
Bit 7
6
5
4
3
2
1
Bit 0
RESET:
U
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