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參數(shù)資料
| 型號： | MC68HC11FC0CFU5 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Technical Summary 8-Bit Microcontroller |
| 中文描述： | 8-BIT, 6 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | QFP-64 |
| 文件頁數(shù)： | 15/74頁 |
| 文件大?。?/td> | 513K |
| 代理商： | MC68HC11FC0CFU5 |
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MOTOROLA
MC68HC11F1/FC0
22
MC68HC11FTS/D
The INIT register can be written only once in first 64 cycles out of reset in normal modes, or at any time
in special modes.
NOTE
The register diagram above applies to the MC68HC11F1 only. A diagram and bit
descriptions of the INIT register in the MC68HC11FC0 are provided elsewhere in
this section.
RAM[3:0] — Internal RAM Map Position
These bits determine the upper four bits of the RAM address and allow mapping of the RAM to any four-
Kbyte boundary. Refer to Table 10.
REG[3:0] — 96-Byte Register Block Map Position
These bits determine bits the upper 4 bits of the register block and allow mapping of the register block
to any four-Kbyte boundary. Refer to Table 10.
GWOM — Port G Wired-OR Mode Option
Refer to 7.8 Parallel I/O Registers, page 36.
INIT — RAM and I/O Mapping (MC68HC11F1 only)
$x03D
Bit 7
6
5
4
3
2
1
Bit 0
RAM3
RAM2
RAM1
RAM0
REG3
REG4
REG1
REG0
RESET:
0
1
Table 10 RAM and Register Mapping
RAM[3:0]
Location
REG[3:0]
Location
0000
$0000-$03FF
0000
$0000-$005F
0001
$1000-$13FF
0001
$1000-$105F
0010
$2000-$23FF
0010
$2000-$205F
0011
$3000-$33FF
0011
$3000-$305F
0100
$4000-$43FF
0100
$4000-$405F
0101
$5000-$53FF
0101
$5000-$505F
0110
$6000-$63FF
0110
$6000-$605F
0111
$7000-$73FF
0111
$7000-$705F
1000
$8000-$83FF
1000
$8000-$805F
1001
$9000-$93FF
1001
$9000-$905F
1010
$A000-$A3FF
1010
$A000-$A05F
1011
$B000-$B3FF
1011
$B000-$B05F
1100
$C000-$C3FF
1100
$C000-$C05F
1101
$D000-$D3FF
1101
$D000-$D05F
1110
$E000-$E3FF
1110
$E000-$E05F
1111
$F000-$F3FF
1111
$F000-$F05F
OPT2 — System Configuration Option Register 2
$x038
Bit 7
6
5
4
3
2
1
Bit 0
GWOM
CWOM
CLK4X
LIRDV
—
SPRBYP
—
RESET
0
1
0
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