參數(shù)資料
型號(hào): MC68HC05X4CDWR2
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.2 MHz, MICROCONTROLLER, PDSO28
封裝: PLASTIC, SOIC-28
文件頁數(shù): 11/168頁
文件大小: 656K
代理商: MC68HC05X4CDWR2
Core Timer
MC68HC05X4 Rev 1.0
108
Core Timer
MOTOROLA
Core timer counter
register (CTCR)
The core timer counter register is a read-only register, which contains
the current value of the 8-bit ripple counter at the beginning of the timer
chain. Reset clears this register.
Core timer during WAIT
The CPU clock halts during the WAIT mode, but the core timer remains
active. If the CTIMER interrupts are enabled, then a CTIMER interrupt
will cause the processor to exit the WAIT mode.
Core timer during STOP
The timer is cleared when going into STOP mode. When STOP is exited
by an external interrupt or an external reset, the internal oscillator will
restart, followed by an internal processor stabilization delay (t
PORL). The
timer is then cleared and operation resumes.
Address:
$0009
Bit 7
654321
Bit 0
Reset:
00000000
Figure 3. Core Timer Counter Register (CTCR)
6-ctimer
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