參數(shù)資料
型號: MC56F8355MFGE
廠商: Freescale Semiconductor
文件頁數(shù): 97/172頁
文件大?。?/td> 0K
描述: IC DSP 16BIT 60MHZ 128-LQFP
標準包裝: 72
系列: 56F8xxx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 60MHz
連通性: CAN,EBI/EMI,SCI,SPI
外圍設備: POR,PWM,溫度傳感器,WDT
輸入/輸出數(shù): 49
程序存儲器容量: 264KB(132K x 16)
程序存儲器類型: 閃存
RAM 容量: 10K x 16
電壓 - 電源 (Vcc/Vdd): 2.25 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x12b
振蕩器型: 外部
工作溫度: -40°C ~ 125°C
封裝/外殼: 128-LQFP
包裝: 托盤
配用: MC56F8367EVME-ND - EVAL BOARD FOR MC56F83X
56F8355 Technical Data, Rev. 17
30
Freescale Semiconductor
Preliminary
PWMA0
58
Output
In reset,
output is
disabled
PWMA0 - 5 — These are six PWMA outputs.
PWMA1
60
PWMA2
61
PWMA3
63
PWMA4
64
PWMA5
66
ISA0
(GPIOC8)
104
Schmitt
Input
Schmitt
Input/
Output
Input,
pullup
enabled
ISA0 - 2 — These three input current status pins are used for
top/bottom pulse width correction in complementary channel
operation for PWMA.
Port C GPIO — These GPIO pins can be individually programmed
as input or output pins.
In the 56F8355, these pins default to ISA functionality.
In the 56F8155, the default state is not one of the functions offered
and must be reconfigured.
To deactivate the internal pullup resistor, clear the appropriate bit
of the GPIOC_PUR register. See Part 6.5.6 for details.
ISA1
(GPIOC9)
105
ISA2
(GPIOC10)
106
FAULTA0
67
Input
Input,
pullup
enabled
FAULTA0 - A2 — These three fault input pins are used for
disabling selected PWMA outputs in cases where fault conditions
originate off-chip.
To deactivate the internal pullup resistor, set the PWMA0 bit in the
SIM_PUDR register. For details, see Part 6.5.6.
FAULTA1
68
FAULTA2
69
FAULTA3
70
Schmitt
Input
Input,
pullup
enabled
FAULTA3 — This fault input pin is used for disabling selected
PWMA outputs in cases where fault conditions originate off-chip.
To deactivate the internal pullup resistor, set the PWMA1 bit in the
SIM_PUDR register. See Part 6.5.6 for details.
PWMB0
32
Output
In reset,
output is
disabled
PWMB0 - 5 — Six PWMB output pins.
PWMB1
33
PWMB2
34
PWMB3
37
PWMB4
38
PWMB5
39
Table 2-2 Signal and Package Information for the 128-Pin LQFP (Continued)
Signal Name
Pin No.
Type
State
During
Reset
Signal Description
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