參數(shù)資料
型號: MC56F8347MPY60
廠商: MOTOROLA INC
元件分類: 數(shù)字信號處理
英文描述: 16-BIT, 120 MHz, OTHER DSP, PQFP160
封裝: LQFP-160
文件頁數(shù): 46/160頁
文件大小: 2217K
代理商: MC56F8347MPY60
14
56F8347 Technical Data
Preliminary
2.2 56F8347 Signal Pins
After reset, all pins are by default the primary function. Any alternate functionality must be
programmed.
If the “State During Reset” lists more than one state for a pin, the first state is the actual reset state.
Other states show the reset condition of the alternate function, which you get if the alternate pin
function is selected without changing the configuration of the alternate peripheral. For example,
the A8/GPIOA0 pin shows that it is tri-stated during reset. If the GPIOA_PER is changed to select
the GPIO function of the pin, it will become an input if no other registers are changed.
Table 2-2 56F8347 Signal and Package Information for the 160-Pin LQFP
Signal Name
Pin No.
Type
State
During
Reset
Signal Description
VDD_IO
1
Supply
I/O Power — This pin supplies 3.3V power to the chip I/O
interface.
VDD_IO
16
VDD_IO
31
VDD_IO
42
VDD_IO
77
VDD_IO
96
VDD_IO
134
VDDA_ADC
114
Supply
ADC Power — This pin supplies 3.3V power to the ADC
modules. It must be connected to a clean analog power
supply.
VDDA_OSC_PLL
92
Supply
Oscillator and PLL Power — This pin supplies 3.3V
power to the OSC and to the internal regulator that in turn
supplies the Phase Locked Loop. It must be connected to
a clean analog power supply.
VSS
27
Supply
VSS — These pins provide ground for chip logic and I/O
drivers.
VSS
41
VSS
74
VSS
80
VSS
125
VSS
160
VSSA_ADC
115
Supply
ADC Analog Ground — This pin supplies an analog
ground to the ADC modules.
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