參數(shù)資料
型號: MC56F8322MFAE
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 數(shù)字信號處理
英文描述: 0-BIT, 120 MHz, OTHER DSP, PQFP48
封裝: ROHS COMPLIANT, LQFP-48
文件頁數(shù): 56/136頁
文件大?。?/td> 719K
代理商: MC56F8322MFAE
56F8322 Techncial Data, Rev. 16
26
Freescale Semiconductor
Preliminary
VREFP
28
Input/
Output
Analog Input/
Output
VREFP, VREFMID & VREFN — Internal pins for voltage reference which
are brought off-chip so that they can be bypassed. Connect to a 0.1
μF
ceramic low ESR capacitor.
VREFMID
27
VREFN
26
CAN_RX
(GPIOC2)
46
Schmitt
Input
Schmitt
Input/
Output
Input,
pull-up
enabled
FlexCAN Receive Data — This is the CAN input. This pin has an
internal pull-up resistor.
Port C GPIO — This GPIO pin can be individually programmed as an
input or output pin.
In the 56F8322, the default state after reset is CAN_RX.
In the 56F8122, the default state is not one of the functions offered
and must be reconfigured.
CAN_TX
(GPIOC3)
47
Open
Drain
Output
Schmitt
Input/
Output
Open
Drain
Output
FlexCAN Transmit Data — CAN output with internal pull-up enable
at reset.*
* Note: If a pin is configured as open drain output mode, internal
pull-up will automatically be disabled when it outputs low. Internal
pull-up will be enabled unless it has been manually disabled by
clearing the corresponding bit in the PUREN register of the GPIO
module, when it outputs high.
If a pin is configured as push-pull output mode, internal pull-up will
automatically be disabled, whether it outputs low or high.
Port C GPIO — This GPIO pin can be individually programmed as an
input or output pin.
In the 56F8322, the default state after reset is CAN_TX.
In the 56F8122, the default state is not one of the functions offered
and must be reconfigured.
TC0
(TXD0)
(GPIOC6)
1Schmitt
Input/
Output
Schmitt
Input
Schmitt
Input/
Output
Input,
pull-up
enabled
TC0 — Timer C, Channel 0
Transmit Data — SCI0 transmit data output
Port C GPIO — This GPIO pin can be individually programmed as an
input or output pin.
After reset, the default state is TC0.
Table 2-2 Signal and Package Information for the 48-Pin LQFP (Continued)
Signal Name
Pin No.
Type
State During
Reset
Signal Description
相關(guān)PDF資料
PDF描述
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