參數(shù)資料
型號: MC56F8146VFVE
廠商: Freescale Semiconductor
文件頁數(shù): 57/178頁
文件大?。?/td> 0K
描述: IC DSP 16BIT 40MHZ 144-LQFP
標準包裝: 60
系列: 56F8xxx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 40MHz
連通性: EBI/EMI,SCI,SPI
外圍設備: POR,PWM,WDT
輸入/輸出數(shù): 62
程序存儲器容量: 128KB(64K x 16)
程序存儲器類型: 閃存
RAM 容量: 4K x 16
電壓 - 電源 (Vcc/Vdd): 2.25 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x12b
振蕩器型: 外部
工作溫度: -40°C ~ 105°C
封裝/外殼: 144-LQFP
包裝: 托盤
Product Documentation
56F8346 Technical Data, Rev. 15
Freescale Semiconductor
15
Preliminary
1.5 Product Documentation
The documents in Table 1-3 are required for a complete description and proper design with the 56F8346
and 56F8146 devices. Documentation is available from local Freescale distributors, Freescale
semiconductor sales offices, Freescale Literature Distribution Centers, or online at
http://www.freescale.com.
Table 1-3 Chip Documentation
Table 1-2 Bus Signal Names
Name
Function
Program Memory Interface
pdb_m[15:0]
Program data bus for instruction word fetches or read operations.
cdbw[15:0]
Primary core data bus used for program memory writes. (Only these 16 bits of the cdbw[31:0] bus
are used for writes to program memory.)
pab[20:0]
Program memory address bus. Data is returned on pdb_m bus.
Primary Data Memory Interface Bus
cdbr_m[31:0]
Primary core data bus for memory reads. Addressed via xab1 bus.
cdbw[31:0]
Primary core data bus for memory writes. Addressed via xab1 bus.
xab1[23:0]
Primary data address bus. Capable of addressing bytes1, words, and long data types. Data is written
on cdbw and returned on cdbr_m. Also used to access memory-mapped I/O.
1. Byte accesses can only occur in the bottom half of the memory address space. The MSB of the address will be forced
to 0.
Secondary Data Memory Interface
xdb2_m[15:0] Secondary data bus used for secondary data address bus xab2 in the dual memory reads.
xab2[23:0]
Secondary data address bus used for the second of two simultaneous accesses. Capable of
addressing only words. Data is returned on xdb2_m.
Peripheral Interface Bus
IPBus [15:0]
Peripheral bus accesses all on-chip peripherals registers. This bus operates at the same clock rate
as the Primary Data Memory and therefore generates no delays when accessing the processor.
Write data is obtained from cdbw. Read data is provided to cdbr_m.
Topic
Description
Order Number
DSP56800E
Reference Manual
Detailed description of the 56800E family architecture,
and 16-bit controller core processor and the instruction
set
DSP56800ERM
56F8300 Peripheral User Manual
Detailed description of peripherals of the 56F8300
devices
MC56F8300UM
56F8300 SCI/CAN Bootloader User
Manual
Detailed description of the SCI/CAN Bootloaders
56F8300 family of devices
MC56F83xxBLUM
56F8346/56F8146
Technical Data Sheet
Electrical and timing specifications, pin descriptions,
and package descriptions (this document)
MC56F8346
Errata
Details any chip issues that might be present
MC56F8346E
MC56F8146E
相關PDF資料
PDF描述
HCZ472MBCDJ0KR CAP CER 4700PF 3KV 20% RADIAL
VJ1812Y125JBAAT4X CAP CER 1.2UF 50V 5% X7R 1812
VJ1825Y155JBBAT4X CAP CER 1.5UF 100V 5% X7R 1825
VJ2225Y123JBCAT4X CAP CER 0.012UF 200V 5% X7R 2225
VJ2225Y123JBEAT4X CAP CER 0.012UF 500V 5% X7R 2225
相關代理商/技術(shù)參數(shù)
參數(shù)描述
MC56F8147 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
MC56F8147VPY 制造商:Motorola Inc 功能描述: 制造商:MOTOROLA 功能描述:
MC56F8147VPYE 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
MC56F8147VVFE 功能描述:IC DGTL SIGNAL CTLR 160-MAPBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器, 系列:56F8xxx 標準包裝:1 系列:87C 核心處理器:MCS 51 芯體尺寸:8-位 速度:16MHz 連通性:SIO 外圍設備:- 輸入/輸出數(shù):32 程序存儲器容量:8KB(8K x 8) 程序存儲器類型:OTP EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4 V ~ 6 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:外部 工作溫度:0°C ~ 70°C 封裝/外殼:44-DIP 包裝:管件 其它名稱:864285
MC56F8155 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-Bit Digital Signal Controllers