
56F8033/56F8023 Signal Pins
56F8033/56F8023 Data Sheet, Rev. 6
Freescale Semiconductor
25
GPIOB0
(SCLK0)
(SCL6)
21
Input/
Output
Input/
Output
Input/
Output
Input,
internal
pull-up
enabled
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
QSPI0 Serial Clock — In the master mode, this pin serves as an
output, clocking slaved listeners. In slave mode, this pin serves as
the data clock input. A Schmitt trigger input is used for noise
immunity.
Serial Clock — This pin serves as the I2C serial clock.
After reset, the default state is GPIOB0. The peripheral functionality
6The SCL signal is also brought out on the GPIOB7 pin.
GPIOB1
(SS0)
(SDA7)
2
Input/
Output
Input/
Output
Input
Input,
internal
pull-up
enabled
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
QSPI0 Slave Select — SS is used in slave mode to indicate to the
QSPI0 module that the current transfer is to be received.
Serial Data — This pin serves as the I2C serial data line.
After reset, the default state is GPIOB1. The peripheral functionality
7The SDA signal is also brought out on the GPIOB6 pin.
Table 2-3 56F8033/56F8023 Signal and Package Information for the 32-Pin LQFP
Signal
Name
LQFP
Pin No.
Type
State During
Reset
Signal Description