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Chapter 13 FlexRay Communication Controller (FLEXRAY)
MC9S12XF - Family Reference Manual, Rev.1.19
494
Freescale Semiconductor
13.5.2.22 Protocol Status Register 2 (PSR2)
This register provides a snapshot of status information about the Network Idle Time NIT, the Symbol
Window and the clock synchronization. The NIT related status bits NBVB, NSEB, NBVA, and NSEA are
updated by the FlexRay block after the end of the NIT and before the end of the rst slot of the next
communication cycle. The Symbol Window related status bits STCB, SBVB, SSEB, MTB, STCA, SBVA,
Table 13-28. PSR1 Field Descriptions
Field
Description
15
CSAA
Cold Start Attempt Aborted Flag — protocol related event: ‘set coldstart abort indicator in CHI’
This ag is set when the FlexRay block has aborted a cold start attempt.
0 No such event
1 Cold start attempt aborted
14
CSP
Leading Cold Start Path — This status bit is set when the FlexRay block has reached the POC:normal active
state via the leading cold start path. This indicates that this node has started the network
0 No such event
1 POC:normal active reached from POC:startup state via leading cold start path
12–8
REMCSAT
Remaining Coldstart Attempts — protocol related variable: vRemainingColdstartAttempts
This eld provides the number of remaining cold start attempts that the FlexRay block will execute.
7
CPN
Leading Cold Start Path Noise — protocol related variable: vPOC!ColdstartNoise
This status bit is set if the FlexRay block has reached the POC:normal active state via the leading cold start path
under noise conditions. This indicates there was some activity on the FlexRay bus while the FlexRay block was
starting up the cluster.
0 No such event
1 POC:normal active state was reached from POC:startup state via noisy leading cold start path
6
HHR
Host Halt Request Pending — protocol related variable: vPOC!CHIHaltRequest
This status bit is set when FlexRay block receives the HALT command from the application via the
Protocolthe protocol is in the POC:default cong state.
0 No such event
1 HALT command received
5
FRZ
Freeze Occurred — protocol related variable: vPOC!Freeze
This status bit is set when the FlexRay block has reached the POC:halt state due to the host FREEZE command
or due to an internal error condition requiring immediate halt. The FlexRay block clears this status bit after a hard
reset condition or when the protocol is in the POC:default cong state.
0 No such event
1 Immediate halt due to FREEZE or internal error condition
4–0
APTAC
Allow Passive to Active Counter — protocol related variable: vPOC!vAllowPassivetoActive
This eld provides the number of consecutive even/odd communication cycle pairs that have passed with valid
rate and offset correction terms, but the protocol is still in the POC:normal passive state due to an application
congured delay to enter POC:normal active state. This delay is dened by the allow_passive_to_active eld in
Module Base + 0x002C
Additional Reset: RUN Command
15
14
13
12
11
10
9876543210
R NBVB NSEB STCB SBVB SSEB MTB
NBVA NSEA STCA SBVA SSEA
MTA
CLKCORRFAILCNT
W
Reset
0000000000000000
Figure 13-22. Protocol Status Register 2 (PSR2)