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參數(shù)資料
| 型號： | MC2300 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Navigator Motion Processor |
| 中文描述： | 導(dǎo)航運動處理器 |
| 文件頁數(shù)： | 56/59頁 |
| 文件大?。?/td> | 1925K |
| 代理商： | MC2300 |
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MC2300 Technical Specifications
56
6.10 RAM Interface
The following schematic shows an interface circuit between the Navigator chipset and external ram.
Comments on Schematic
The CP is capable of directly addressing 32K words of 16-bit memory. It will also use a 16 bit
paging register to address up to 32K word pages. The schematic shows the paging and addressing
for 128KB RAM chips, i.e. 4 pages per RAM chip. The page address decoding is shown for only 6 of
the 16 possible paging bits. The decoding time from W/R and DS- to the memory output must not
exceed 18 ns. for a read with no wait states. The writes provide 25 extra ns access time for W/R and
DS- to reverse the CP data bus.
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