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| 型號： | MC2300 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Navigator Motion Processor |
| 中文描述： | 導(dǎo)航運(yùn)動處理器 |
| 文件頁數(shù)： | 34/59頁 |
| 文件大?。?/td> | 1925K |
| 代理商： | MC2300 |
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MC2300 Technical Specifications
34
5.4.2
CP chip
CP chip
Pin Name and
number
~WriteEnbl
R/~W
Direction
Description
1
4
output
output
When
low
, this signal enables data to be written to the bus.
This signal is
high
when the CP chip is performing a read, and
low
when it is
performing a write. It should be connected to I/O chip pin 53,
CPR/~W.
This signal is
low
when the data and address are valid during CP
communications. It should be connected to I/O chip pin 54,
CPStrobe
.
This signal is
low
when peripheral devices on the data bus are being addressed. It
should be connected to I/O chip pin 52,
CPPeriphSlct
.
This signal is
low
indicates when external memory is being accessed.
This is the master reset signal. When brought
low
, this pin resets the chipset to its
initial conditions.
This signal is the inverse of
R/~W
; it is
high
when
R/~W
is low, and vice versa. For
some decode circuits this is more convenient than
R/~W
.
This pin receives serial data from the asynchronous serial port.
~Strobe
6
output
~PeriphSlct
130
output
~RAMSlct
~Reset
129
41
output
input
W/~R
132
output
SrlRcv
43
input
NOTE! If this signal is not used, it should be tied high.
SrlXmt
SrlEnable
44
99
output
output
This pin transmits serial data to the asynchronous serial port.
This pin sets the serial port enable line. SrlEnable is always
high
for the point-to-
point protocol and is
high
during transmission for the multi-drop protocol.
When
low
, this signal causes an interrupt to be sent to the host processor.
This signal interrupts the CP chip when a host I/O transfer is complete. It
should be connected to I/O chip pin 77,
CPIntrpt
.
Bi-directional Multi-purpose data lines. These pins comprise the CP chip’s external data bus,
used for all communications with the I/O chip and peripheral devices such as
external memory or DACs. They may also be used for parallel-word input and
for user-defined I/O operations.
~HostIntrpt
I/OIntrpt
98
53
output
input
Data0
Data1
Data2
Data3
Data4
Data5
Data6
Data7
Data8
Data9
Data10
Data11
Data12
Data13
Data14
Data15
9
10
11
12
15
16
17
18
19
22
23
24
25
26
27
28
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