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參數(shù)資料
| 型號： | MC10E197 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | DATA SEPARATOR |
| 中文描述： | 數(shù)據(jù)分離器 |
| 文件頁數(shù)： | 6/16頁 |
| 文件大?。?/td> | 217K |
| 代理商： | MC10E197 |
MC10E197
MOTOROLA
ECLinPS and ECLinPS Lite
DL140 — Rev 4
2–6
separation for signals encoded in 2:7 or 1:7 RLL encoding
schemes; hence, Tables 1 and 2 are coding tables for these
schemes. Table 3 lists nominal phase detector gains for both
2:7 and 1:7 sync fields.
NRZ Data Sequence
Code Sequence
00
01
1000
0100
100
101
111
001000
100100
000100
1100
1101
00001000
00100100
Table 1. 2:7 RLL Encoding Table
NRZ Data Sequence
Code Sequence
00
01
10
X01
010
X00
1100
1101
1110
1111
An X in the leading bit of a code sequence is assigned the
complement of the bit
Table 2. 1:7 RLL Encoding Table
010001
X00000
X00001
010000
Sync Pattern
Read Mode
Idle Mode
2:7
121 mV/radian
484 mV/radian
1:7
161 mV/radian
483 mV/radian
Table 3. Phase Detector Gain Constants
VCO Gain Constant
The gain of the VCO is a function of the tuning capacitor.
For a value of 10pF a nominal value of the gain, Ko, is
20MHz per volt.
Filter Circuitry Gain Constant(s)
The open loop gain constant of the filter circuitry is given by:
Kfc = K1 * Kl * Kd
eqt. 2
The individual gain constants are defined in the appropriate
subsections of this document.
Loop Filter
The two major functions of the loop filter are to remove any
noise or high frequency components present in the phase
detector output signal and, more importantly, to control the
characteristics which determine the dynamic response of the
phase lock loop; i.e. capture range, loop bandwidth, capture
time, and transient response.
Although a variety of loop filter configurations exist, this
section will only describe a filter capable of performing the
signal processing as described in the Data Read Mode and
the Idle Mode sections. The loop filter consists of a differential
summing amplifier cascaded with an augmenting integrator
which drives the VCOIN input to the 10E197 through a resistor
divider network (Figure 3).
The transfer function and the element values for the loop
filter are derived by dividing the filter into three cascaded
subsections: filter input, augmenting integrator, and the
voltage divider network (Figure 4).
Loop Filter Transfer Function
The open loop transfer function of the phase lock loop is the
product of each individual filter subsection, as well as the
phase detector and VCO. Thus, the open loop filter transfer
function is:
Ko
s
where:
Fo(s) = K
φ
*
Fd(s) = Kd *
* F1(s) * Fl(s) * Fd(s)
F1(s) = K1 *
1
(s + p1)*
1
[s2 + (2
ζω
o1
ω
[s2 + (2
ζω
ω
o2
) s +
Fl(s) = Kl *
1
s
*
(s + z)
1
(s + p2)
2 ]
Figure 3. Loop Filter Circuitry
PUMPUP
PUMPDN
VEEVCO
VEEVCO
VCCVCO
VCCVCO
VEEVCO
VEEVCO
R1
R1
RIA
RA
CA
RV
RO
DB
CO
R3
R1
R1
CIN
CIN
VO
MC34182
MC34182
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| MC10E197FN | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC10E211 C14N WAF | 制造商:ON Semiconductor 功能描述: |
| MC10E211FN | 功能描述:時鐘驅(qū)動器及分配 5V ECL 1:6 Diff RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MC10E211FNG | 功能描述:時鐘驅(qū)動器及分配 5V ECL 1:6 Diff Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MC10E211FNR2 | 功能描述:時鐘驅(qū)動器及分配 5V ECL 1:6 Diff RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
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