參數(shù)資料
型號： MB9AF312LPMC1
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP64
封裝： 0.50 MM PITCH, PLASTIC, LQFP-64
文件頁數(shù)： 69/114頁
文件大?。?/td> 1357K
代理商： MB9AF312LPMC1
ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
58
12.4
Register Description
12.4.1 Moving Interrupts Between Application and Boot Space, Atmel ATmega88PA, ATmega168PA
The MCU control register controls the placement of the interrupt vector table.
MCUCR – MCU control register
Note:
BODS and BODSE only available for picoPower devices ATmega48PA/88PA/168PA
Bit 1 – IVSEL: Interrupt Vector Select
When the IVSEL bit is cleared (zero), the interrupt vectors are placed at the start of the flash memory. When this bit is set
(one), the interrupt vectors are moved to the beginning of the boot loader section of the flash. The actual address of the start
of the boot flash section is determined by the BOOTSZ Fuses. Refer to the
changes of interrupt vector tables, a special write procedure must be followed to change the IVSEL bit:
a.
Write the interrupt vector change enable (IVCE) bit to one.
b.
Within four cycles, write the desired value to IVSEL while writing a zero to IVCE.
Interrupts will automatically be disabled while this sequence is executed. Interrupts are disabled in the cycle IVCE is set, and
they remain disabled until after the instruction following the write to IVSEL. If IVSEL is not written, interrupts remain disabled
for four cycles. The I-bit in the status register is unaffected by the automatic disabling.
Note:
If interrupt vectors are placed in the boot loader section and boot lock bit BLB02 is programmed, interrupts are
disabled while executing from the application section. If interrupt vectors are placed in the application section
and boot lock bit BLB12 is programed, interrupts are disabled while executing from the boot loader section.
on boot lock bits.
Bit 0 – IVCE: Interrupt Vector Change Enable
The IVCE bit must be written to logic one to enable change of the IVSEL bit. IVCE is cleared by hardware four cycles after it
is written or when IVSEL is written. Setting the IVCE bit will disable interrupts, as explained in the IVSEL description above.
See code example below.
Bit
7
6
5
43210
–
BODS(1) BODSE(1)
PUD
–
IVSEL
IVCE
MCUCR
Read/Write
R
R/W
R
R/W
Initial Value
0
00000
Assembly Code Example
Move_interrupts:
; Enable change of Interrupt Vectors
ldi
r16, (1<<IVCE)
out
MCUCR, r16
; Move interrupts to Boot Flash section
ldi
r16, (1<<IVSEL)
out
MCUCR, r16
ret
C Code Example
void
Move_interrupts(void)
{
/* Enable change of Interrupt Vectors */
MCUCR = (1<<IVCE);
/* Move interrupts to Boot Flash section */
MCUCR = (1<<IVSEL);
}
相關PDF資料
PDF描述
MB9AF312MPMC 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP80
MB9AF312LPMC 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP64
MB9AF311NPMC 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP100
MB9AF316NPMC RISC MICROCONTROLLER, PQFP100
MB9AF314NPMC RISC MICROCONTROLLER, PQFP100
相關代理商/技術參數(shù)
參數(shù)描述
MB9AF314LAPMC1-G-JNE2 制造商:FUJITSU 功能描述:
MB9AF314LAPMC-G-JNE2 制造商:Fujitsu 功能描述:Bulk
MB9AF314LAQN-G-AVE2 功能描述:ARM? Cortex?-M3 FM3 MB9A310A Microcontroller IC 32-Bit 40MHz 256KB (256K x 8) FLASH 64-QFN Exposed Pad (9x9) 制造商:cypress semiconductor corp 系列:FM3 MB9A310A 包裝:托盤 零件狀態(tài):有效 核心處理器:ARM? Cortex?-M3 核心尺寸:32-位 速度:40MHz 連接性:CSIO，I2C，LIN，UART/USART，USB 外設:DMA，LVD，POR，PWM，WDT I/O 數(shù):51 程序存儲容量:256KB（256K x 8） 程序存儲器類型:閃存 EEPROM 容量:- RAM 容量:32K x 8 電壓 - 電源（Vcc/Vdd）:2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 9x12b 振蕩器類型:內(nèi)部 工作溫度:-40°C ~ 105°C（TA） 封裝/外殼:64-VFQFN 裸露焊盤 供應商器件封裝:64-QFN 裸露焊盤（9x9） 標準包裝:260
MB9AF314LPMC1-ESE1 制造商:FUJITSU 功能描述:
MB9AF314LPMC1-GE1 制造商:FUJITSU 功能描述:
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*