參數(shù)資料
型號(hào): MB9AF311NPMC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP100
封裝: 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁數(shù): 75/114頁
文件大?。?/td> 1357K
代理商: MB9AF311NPMC
63
ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
13.2.6 PCMSK2 – Pin Change Mask Register 2
Bit 7:0 – PCINT[23:16]: Pin Change Enable Mask 23...16
Each PCINT[23:16]-bit selects whether pin change interrupt is enabled on the corresponding I/O pin. If PCINT[23:16] is set
and the PCIE2 bit in PCICR is set, pin change interrupt is enabled on the corresponding I/O pin. If PCINT[23:16] is cleared,
pin change interrupt on the corresponding I/O pin is disabled.
13.2.7 PCMSK1 – Pin Change Mask Register 1
Bit 7 – Reserved
This bit is an unused bit in the Atmel ATmega48PA/88PA/168PA, and will always read as zero.
Bit 6:0 – PCINT[14:8]: Pin Change Enable Mask 14...8
Each PCINT[14:8]-bit selects whether pin change interrupt is enabled on the corresponding I/O pin. If PCINT[14:8] is set and
the PCIE1 bit in PCICR is set, pin change interrupt is enabled on the corresponding I/O pin. If PCINT[14:8] is cleared, pin
change interrupt on the corresponding I/O pin is disabled.
13.2.8 PCMSK0 – Pin Change Mask Register 0
Bit 7:0 – PCINT[7:0]: Pin Change Enable Mask 7...0
Each PCINT[7:0] bit selects whether pin change interrupt is enabled on the corresponding I/O pin. If PCINT[7:0] is set and
the PCIE0 bit in PCICR is set, pin change interrupt is enabled on the corresponding I/O pin. If PCINT[7:0] is cleared, pin
change interrupt on the corresponding I/O pin is disabled.
Bit
7
65
43
2
1
0
PCINT23 PCINT22 PCINT21 PCINT20 PCINT19 PCINT18 PCINT17 PCINT16 PCMSK2
Read/Write
R/W
Initial Value
0
Bit
7
654
32
1
0
PCINT14 PCINT13 PCINT12 PCINT11 PCINT10 PCINT9
PCINT8
PCMSK1
Read/Write
R
R/W
Initial Value
0
Bit
765
43210
PCINT7
PCINT6
PCINT5
PCINT4
PCINT3
PCINT2
PCINT1
PCINT0
PCMSK0
Read/Write
R/W
Initial Value
000
00000
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