參數(shù)資料
型號: MB90F395HPMT
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP120
封裝: PLASTIC, LQFP-120
文件頁數(shù): 48/66頁
文件大?。?/td> 917K
代理商: MB90F395HPMT
MB90390 Series
52
Bit setting : ESCR3 : SCES
= 1, ECCR3 : SCDE = 0
(TA
= 40 °C to +85 °C, VCC = 3.5 V to 5.5 V, VSS = 0 V)
Notes :
CL is load capacity value of pins when testing.
Depending on the used machine clock frequency, the maximum possible baud rate can be limited be
some parameters. These parameters are shown in “MB90390 series hardware manual”.
tCP is the machine clock cycle time. Refer to “ (1) Clock timing”.
Parameter
Symbol
Pin
Condition
Value
Unit
Min
Max
Serial clock cycle time
tSCYC
SCK3
Internal clock
operation output
pins are
CL
= 80 pF + 1 TTL
5 tCP
ns
SCK
↑ → SOT delay time
tSHOVI
SCK3, SOT3
50
+50
ns
Valid SIN
→ SCK↓
tIVSLI
SCK3, SIN3
tCP
+80
ns
SCK
↓ → Valid SIN hold time
tSLIXI
SCK3, SIN3
0
ns
Serial clock “H” pulse width
tSHSL
SCK3
External clock
operation output
pins are
CL
= 80 pF + 1 TTL
3 tCP
tR
ns
Serial clock “L” pulse width
tSLSH
SCK3
tCP
+10
ns
SCK
↑ → SOT delay time
tSHOVE
SCK3, SOT3
2 tCP
+60
ns
Valid SIN
→ SCK↓
tIVSLE
SCK3, SIN3
30
ns
SCK
↓ →Valid SIN hold time
tSLIXE
SCK3, SIN3
tCP
+30
ns
SCK fall time
tF
SCK3
10
ns
SCK rise time
tR
SCK3
10
ns
SCK
SOT
SIN
tSLSH
tIVSHE
tSHIXE
VIL
VIH
2.4 V
0.8 V
VIH
VIL
tSLOVE
tSHSL
tR
tF
VIH
VIL
External Shift Clock Mode
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