
MB90390 Series
3
■ PRODUCT LINEUP
(Continued)
Part Number
Parameter
MB90F394H
MB90F395H
MB90V390H
CPU
F2MC-16LX CPU
System clock
On-chip PLL clock multiplier (
× 1, × 2, × 3, × 4, × 6, 1/2 when PLL stops)
Minimum instruction execution time : 42 ns (4 MHz osc. PLL
× 6)
ROM
Boot-block
Flash memory 384 KB
Hard-wired reset vector,
points to address FFA000H
Boot-block
Flash memory 512 KB
Hard-wired reset vector,
points to address FBA000H
External
RAM
10 KB
30 KB
16 KB
Emulator-specific
power supply*1
Yes
Technology
0.35
m CMOS with on-chip voltage regulator for internal
power supply
+ Flash memory with On-chip charge pump
for programming voltage
0.35
m CMOS with on-chip
voltage regulator for internal
power supply
Operating
voltage range
3.5 V to 5.5 V
(4.0 V to 5.5 V: during Flash programming and erasing,
4.5 V to 5.5 V: if A/D Converter is used)
5 V
± 10%
Temperature range
40 °C to +85 °C
Package
LQFP-120
PGA-299
UART
2 channels
3 channels
Full duplex double buffer
Supports asynchronous/synchronous (with start/stop bit) transfer
Baud rate : 4808/9615/10417/19230/38460/62500/500000 bps (asynchronous)
500 K/1 M/2 Mbps (synchronous) at System clock
= 24 MHz
UART (LIN/SCI)
1 channel
I2C (400 Kbps)
1 channel
Serial I/O
Transfer can be started from MSB or LSB
Supports internal clock synchronized transfer and external clock synchronized transfer
Supports positive-edge and negative-edge clock synchronization
Baud rate : 31.25 K/62.5 K/125 K/500 K/1 Mbps at System clock
= 24 MHz
A/D Converter
15 input channels
10-bit or 8-bit resolution
Conversion time : Min 4.9
s include sample time (per one channel, depends on machine
clock frequency)
16-bit Reload Timer
(2 channels)
Operation clock frequency : fsys/21, fsys/23, fsys/25 (fsys
= System clock frequency)
Supports External Event Count function
Watch Timer
Directly operates with the oscillation clock
Read/Write accessible Second/Minute/Hour registers
Signals interrupts