
399
INDEX
setting standby mode, note on............................... 76
single-chip mode.................................................... 78
sleep mode, operation relating to........................... 70
special instruction ................................................ 379
stack area for interrupt processing......................... 47
stack operation at beginning of
interrupt processing ..................................... 46
stack operation at end of interrupt processing ....... 46
standby control register (STBC)............................. 72
standby mode ........................................................ 68
standby mode and at halfway stop operation ...... 200
standby mode and at suspension, operation in ... 154
standby mode and interrupt transition.................... 76
standby mode by an interrupt cancellation ............ 76
standby mode operation ........................................ 69
state of reset waiting for stabilization of
oscillation ..................................................... 54
state of terminal after cpu read mode data ............ 55
state of terminal during reset ................................. 55
state transition in standby mode diagram .............. 74
stop mode, operation relating to ............................ 71
system clock control register (SYCC)
configuration ................................................ 62
T
timebase timer block diagram .............................. 118
timebase timer control register (TBTC)................ 120
timebase timer operation ..................................... 123
timebase timer programming example................. 126
timebase timer, note on using.............................. 125
timer 0 control register (TCR0) ............................ 176
timer 0 data register (TDR0) ................................ 181
timer 1 control register (TCR1) ............................ 178
timer 1 data register (TDR1) ................................ 183
timer output control register (TCR2) .....................180
transfer clock rate, choice of.................................285
transfer instruction ................................................383
transferred data format .........................................309
transmission interrupt ...........................................308
transmission operation in operating mode
is 0, 1, 2, or 3..............................................311
U
UART block diagram ............................................289
UART function ......................................................284
UART interrupt related register and
vector table address ...................................308
UART relating pin .................................................292
UART, program example for.................................316
UART-relating register..........................................294
UART-relating terminal block diagram..................293
V
vector table area (address
FFC0H to FFFFH) ...................................................24
W
watchdog control register (WDTC) .......................132
watchdog timer block diagram ..............................131
watchdog timer function........................................130
watchdog timer operation .....................................133
watchdog timer programming example ................136
watchdog timer, note on using..............................135
wild register address list .......................................365
wild register applicable address ...........................356
wild register function .............................................356
wild register function block diagram .....................357
wild register function operation order ...................365